Memory controller, memory read control method, and related memory system

Abstract

The invention provides a memory controller, a memory read control method and a related memory system. The memory controller includes a data latch circuit, a mask generation circuit, a clock control logic electrically coupled to the mask generation circuit, and a demultiplexer electrically coupled to the data latch circuit and the clock control logic. The data latch circuit latches a series of datain a data signal from the memory according to a data strobe signal from the memory. The mask generation circuit generates a mask signal according to the data strobe signal. The clock control logic generates a received clock signal according to the mask signal. The demultiplexer determines valid data in the series of data by means of the received clock signal. According to the invention, the problem that extra data delay is generated in related technologies can be solved; and compared with the prior art, the timing sequence of the mask signal generated by the memory controller provided by theinvention has higher tolerance.

Description

technical field [0001] The invention relates to memory read control, in particular to a memory controller, a memory read control method and a related storage system. Background technique [0002] When a memory controller accesses a double data rate (double data rate, DDR) memory (such as a double data rate synchronous dynamic random access memory (DDR synchronous dynamic random access memory, DDR SDRAM)), in order to determine the memory The timing of accessing data, the accessing data will be transmitted between the memory controller and the double data rate memory together with a data strobe signal. Taking the read action as an example, when the memory controller reads valid data in a data signal from the double data rate memory, the data strobe signal received by the memory controller not only includes the valid data that can be used to latch the valid data. A periodic clock signal of the signal may additionally contain some jitter signals at points in time before and af...

AI Technical Summary

Problems solved by technology

[0004] An object of the present invention is to provide a memory controller, a memory read control method and a related storage system, so as to solve the above-mentioned problem that valid data is delayed

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