NOR flash memory manufacturing method, circuit and application thereof

Abstract

The invention relates to the technical field of semiconductor manufacturing, and discloses a NOR flash memory manufacturing method, circuit and application thereof. The method comprises the steps that on the basis of a wafer of a NOR flash memory circuit with a flash memory unit and three metal layers, a third metal layer is covered with a fourth metal layer communicated with the third metal layer. The method disclosed in the invention is compatible with the existing process. The metal wiring requirement of the Nor flash memory chip with more complex functions can be met, feasible preconditions are provided for arranging more aluminum pads to meet the requirement of advanced packaging pressure welding, and the practical value in practical significance is achieved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a manufacturing method, circuit and application of a NOR flash memory. Background technique [0002] The characteristic of Nor flash memory is that it is executed in the chip, so that the application program can run directly in the flash memory without having to read the code into the system RAM. The transmission efficiency of NOR flash memory is very high, and it has high cost-effectiveness in the small capacity of 1-16MB. [0003] The traditional Nor flash memory process only has three metal layers available. With the development of the process, the area of ​​the chip with the same capacity is getting smaller and smaller, but the functions that the chip can provide have increased. At the same time, under the requirements of advanced packaging, The number of aluminum pads (Al Pad) required for package bonding is also increasing, so the traditional Nor flash ...

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Problems solved by technology

[0003] The traditional Nor flash memory process only has three metal layers available. With the development of the process, the area of ​​the chip with the same capacity is getting smaller and smaller, but the functions that the chip can provide have increased. At the same time, under the requirements of advanced packaging, The number of aluminum pads (Al Pad) required for package bonding is also increasing, so the traditional Nor flash memory three-layer metal layer process cannot meet the needs of complex circuits and more aluminum pad wiring

[0004] At present, packaging factories in the industry provide a wafer-level packaging process (WLP). After the wafer process is completed, more aluminum pads are re-arranged on the surface of the wafer by adding process steps to meet different packaging requirements. The solution cannot meet the requirements of metal wiring with complex functional circuit design, and the production cost is high, the cycle is long, and the flexibility is poor. It can only meet the needs of arranging more aluminum pads.

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