Hard chip section analysis and sample preparation method

A chip and hard technology, applied in the field of hard chip cross-section analysis and sample preparation, can solve the problems of difficult analysis and research of silicon carbide type hard chips, and achieve the effects of convenient operation, low analysis cost and good observation effect.

Pending Publication Date: 2022-07-05
苏试宜特(深圳)检测技术有限公司
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  • Application Information

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Problems solved by technology

Due to the high hardness of silicon carbide materials, the previous analysis methods will not be applicable, making the analysis and research of silicon carbide hard chips more difficult

Method used

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  • Hard chip section analysis and sample preparation method

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Embodiment Construction

[0030] In order to solve the problem that the new hard chip does not have a good method for sample preparation for cross-section analysis, the present invention provides a method for sample preparation for cross-section analysis of a hard chip, which ensures the smoothness of the sample, simplifies the sample preparation process, is convenient to operate, and can observe The effect is good, it is beneficial to the subsequent analysis of the sample, and the analysis cost is low.

[0031] The sample preparation method for cross-section analysis of the hard chip will be further described below with specific embodiments and accompanying drawings.

[0032] see figure 1 As shown, a sample preparation method for hard chip cross-section analysis includes the steps:

[0033] Step 1. Remove the hard chip package and take out the wafer.

[0034] Specifically, the hard chip is a chip of hard material such as silicon carbide, which has a package. When performing this step: first place th...

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Abstract

The invention relates to a hard chip section analysis and sample preparation method. The method comprises the following steps: removing a package of a hard chip and taking out a wafer; diamond abrasive paper is used for grinding the wafer, and after the wafer is ground to the position to be observed and is completely displayed, polishing and washing are carried out; the wafer does not need to be plated with a conducting layer, the polished and washed wafer is directly placed on an SEM sample table, and the position to be observed is observed at the working voltage of 1 KV to 5 KV and the working distance of 10 mm to 12 mm. By adopting the section analysis sample preparation method disclosed by the invention, the flatness and smoothness of the hard chip sample are ensured, the sample preparation process is simplified, the operation is convenient, the observation effect is good, the subsequent analysis of the sample is facilitated, and the analysis cost is low.

Description

technical field [0001] The invention relates to the field of integrated circuit failure analysis and research and development, in particular to a sample preparation method for hard chip section analysis. Background technique [0002] After decades of development and research, we have thoroughly researched and applied the first generation of semiconductor silicon materials. At present, the vast majority of semiconductor products on the market are made of silicon as raw material. With the rapid development of technology, emerging fields such as data centers, 5G communications, and new energy vehicles continue to emerge, which have higher requirements for semiconductor devices. The possibility of improving device performance based on silicon materials is approaching the limit. The third-generation semiconductors represented by silicon carbide have excellent material physical properties, providing more space for improving device performance. Due to the high hardness of silicon ...

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Application Information

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Patent Type & AuthorityApplications(China)
IPC IPC(8): G01N23/2202G01N23/2251
CPCG01N23/2202G01N23/2251
Inventor李延昭刘晋平龚萌萌
Owner苏试宜特(深圳)检测技术有限公司