Method and device for realizing disparting pixel Interpolation for variable block size motion compensation

A motion compensation and sub-pixel technology, which is applied in television, electrical components, digital video signal modification, etc., can solve the problems of many clock cycles and low hardware utilization rate, and achieve the goal of reducing the number of clock cycles and improving hardware utilization rate Effect

Inactive Publication Date: 2007-02-07
TSINGHUA UNIV
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Problems solved by technology

It includes the row interpolation operation unit and the column interpolation operation unit, and the hardware utilization rate is low
The number of clock cycles required for simultaneous interpolation is large

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  • Method and device for realizing disparting pixel Interpolation for variable block size motion compensation
  • Method and device for realizing disparting pixel Interpolation for variable block size motion compensation
  • Method and device for realizing disparting pixel Interpolation for variable block size motion compensation

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Embodiment Construction

[0021] The implementation method and implementation device of the variable block size motion compensation sub-pixel interpolation proposed by the present invention are described in detail in conjunction with the accompanying drawings and embodiments as follows:

[0022] The realization method of variable block size motion compensation sub-pixel interpolation proposed by the present invention comprises the following steps:

[0023] 1) storing the pixel data for interpolation into the reference pixel block data buffer area;

[0024] 2) dividing a plurality of interpolation points into multiple types, and interpolating each type of interpolation point respectively to obtain a motion prediction value;

[0025] 3) The motion prediction value is stored in the motion prediction value memory by row or by column according to each type of interpolation point.

[0026] Taking H.264 / AVC as an example below, the sub-pixel interpolation implementation method of the present invention will b...

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Abstract

The invention relates to a method for variable-block motion compensation pixel interpolation, and relative device, wherein said method comprises: storing the pixel data used in interpolation into the reference pixel block data buffer area; dividing several interpolation points into several types, to interpolate on each interpolation point, to obtain the motion predict value; storing said motion predict values in row or queue into motion predict valve memory. And said device comprises: connected reference pixel block data buffer module, sub pixel interpolation unit and motion predict value memory. The invention can improve the efficiency of sub pixel interpolation.

Description

technical field [0001] The invention belongs to the technical field of video and image coding and decoding in signal processing, and in particular relates to a VLSI system structure and a data buffering method for variable block size motion compensation in the coding and decoding process. Background technique [0002] H.264 / AVC is the latest international standard for video coding. The new international video coding standard adopts many new coding technologies, such as context-based variable length coding (CAVLC), higher-precision motion vector prediction, variable block size motion prediction and compensation, intra prediction, integer transformation, etc. Compared with the MPEG-4 video coding international standard, the coding efficiency is doubled. [0003] The method of motion compensation is, for a decoded macroblock (16×16 pixel block) of the current frame image, in the off-chip reference frame image memory, according to the motion vector, the corresponding prediction...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N7/32H04N19/57H04N19/577
Inventor 何芸李宇瞿艳梅
Owner TSINGHUA UNIV
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