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Array substrate and display device

a display device and substrate technology, applied in the field of display technology, can solve the problems of deteriorating display quality and steadily worsening situation, and achieve the effect of improving the display effect of the display device and reducing the capacitance between the two

Active Publication Date: 2015-12-17
BOE TECH GRP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0004]In view of this, the present disclosure provides an array substrate and a display device, which can reduce a coupling capacitance at an overlapping region between a gate line and a data line.
[0017]The first branch of the data line overlaps the gate line, and the second branch overlaps the gate electrode of the TFT. Since the width of the first branch is less than the width of the non-overlapping portion of the data line that does not overlap the gate line, thus, an area of an overlapping region between the data line and the gate line may be reduced and the coupling capacitance therebetween may be reduced, thereby improving a display effect of the display device including the array substrate.

Problems solved by technology

A coupling capacitance, present at an overlapping portion between the gate line and the data line, will adversely affect the transmission of a gate line signal and a data line signal, and thus deteriorate the display quality.
Along with an increasing size of the display panel, such a situation grows steadily worse.

Method used

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Examples

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Embodiment Construction

[0023]In order to prevent a display effect of a display panel from being adversely affected due to signal delay caused by the coupling capacitance present at an overlapping portion between a gate line and a data line in an existing array substrate, one embodiment of the present disclosure provides an array substrate including a plurality of gate lines, a plurality of data lines intersecting with the gate lines, and a plurality of TFTs connected to the gate lines and the data lines. The data line is divided into a first branch and a second branch at a predetermined region where an intersection of the data line and the gate line is located. The first branch overlaps the gate line. The first branch has a width less than a width of a non-overlapping portion of the data line which does not overlap the gate lines. The second branch overlaps a gate electrode of the TFT, and serves as, or is connected to, a source electrode of the TFT.

[0024]The predetermined region where the intersection of...

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PUM

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Abstract

The present disclosure provides an array substrate and a display device. The array substrate includes gate lines, data lines, and thin film transistors (TFTs) connected to the gate lines and the data lines. At least one of the data lines is divided into a first branch and a second branch at a predetermined region where an intersection of the at least one of the data lines and at least one of the gate lines is located. The first branch overlaps the at least one of the gate lines, and has a width less than a width of a non-overlapping portion of the at least one of the data lines which does not overlap the at least one of the gate lines. The second branch overlaps a gate electrode of a corresponding one of the TFTs, and serves as, or is connected to, a source electrode of the corresponding TFT.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]The present application claims a priority of the Chinese patent application No. 201420313509.7 filed on Jun. 12, 2014, which is incorporated herein by reference in its entirety.FIELD OF THE INVENTION[0002]The present disclosure relates to the field of display technology, in particular to an array substrate and a display device.DESCRIPTION OF THE PRIOR ART[0003]Liquid crystal display technology has been widely used in TVs, mobile telephones and public information distributed systems. A liquid crystal display panel includes an array substrate and a color film substrate arranged opposite to each other to form a cell. The array substrate includes a plurality of gate lines and a plurality of data lines that intersect with each other. A coupling capacitance, present at an overlapping portion between the gate line and the data line, will adversely affect the transmission of a gate line signal and a data line signal, and thus deteriorate the displ...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L27/12
CPCH01L27/124G02F1/1368G02F1/136286
Inventor CHENG, HONGFEIQIAO, YONGXIAN, JIANBOLI, WENBOLI, PAN
Owner BOE TECH GRP CO LTD
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