Power conversion device, time signal generator and method thereof

Active Publication Date: 2019-04-18
UPI SEMICON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The invention provides a power conversion device, time signal generator, and method that avoids ripple in output voltage and improves stability. The time signal generator includes a current source and a current source circuit with a noise-cancelling function that prevents ripple in output voltage. This improves the stability of the power conversion device.

Problems solved by technology

When the interval time between two adjacent on-time signals is over large, the signal frequency output by the time signal generator is similar to audio, and thus noise is generated.
However, when the time signal generator keeps switching between the general mode and the discontinuous conduction mode, the time signal generator keeps outputting the constant-on-time signal and the minimum-on-time signal alternately, which causes the output voltage of the power conversion device to generate ripple, and thus and stability of the power conversion device is reduced.

Method used

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  • Power conversion device, time signal generator and method thereof
  • Power conversion device, time signal generator and method thereof
  • Power conversion device, time signal generator and method thereof

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Embodiment Construction

[0015]FIG. 1 is a schematic view of a power conversion device according to an embodiment of the invention. As shown in FIG. 1, a power conversion device 10 includes a time signal generator 100, a driving circuit 11, a power output stage 12, an impedance circuit consisting of an inductor L1 and a capacitor C1, resistances R1-R2 and a feedback circuit 13. The time signal generator 100 may generate an on-time signal TON. The driving circuit 11 is electrically connected to the time signal generator 100 and may generate a plurality of driving signals DR1-DR2 in response to the on-time signal TON. The power output stage 12 is electrically connected to the driving circuit 11, and may control the current flowing through the inductor L1 and capacitor C1 in response to the driving signals DR1-DR2. In this manner, the power conversion device 10 may convert an input voltage VIN into an output voltage VO.

[0016]The driving circuit 11 includes a buffer 14 and an inverter 15, and the power output s...

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Abstract

A time signal generator includes a time signal circuit and a timing circuit. The time signal circuit includes a current source and a current source circuit, and has a first mode and a second mode. The time signal generator provides a first on-time signal according to the current source in the first mode. The timing circuit is connected to the time signal circuit, and includes a first timing circuit. When the timing circuit counts to a first predetermined time, the first timing circuit provides a first control signal to the current source circuit, such that the time signal generator provides a second on-time signal according to the current source and the current source circuit in the second mode. A width of the second on-time signal is less than a width of the first on-time signal.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]This application claims the priority benefit of Taiwan application serial no. 106135563, filed on Oct. 17, 2017. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.TECHNICAL FIELD[0002]The invention is related to a power conversion technology, and particularly to a power conversion device, a time signal generator and a method thereof.DESCRIPTION OF RELATED ART[0003]Generally speaking, a power conversion device generates a plurality of continuous on-time signals via a time signal generator to control power switch in a power output stage. In light load conditions, the power conversion device enters a discontinuous conduction mode (DCM) from a general mode, by extending the interval time between two adjacent on-time signals, power consumption is reduced and output stably. When the interval time between two adjacent on-time signals is over large, the signal fr...

Claims

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Application Information

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IPC IPC(8): H02M3/158H02M1/08
CPCH02M3/158H02M1/08H02M2001/0025H02M1/14H02M3/1584H02M1/0025
InventorHUANG, KUN-MINHUNG, CHANG-YU
OwnerUPI SEMICON CORP