91 results about "Digital video interface" patented technology

The present invention relates to a configurable emissive display tile, e.g. an organic light-emitting diode (OLED) display tile and associated methods for use in a tiled large-screen display application. The OLED tile assembly of the present invention is capable of operating either as an autonomous display or, alternatively, may operate within a set of OLED display tiles forming a larger tiled display. An embodiment of an OLED tile assembly (100) according to an embodiment of the present invention is shown in FIG. 1C, including a power supply (158), a cooling system with cooling fans (160) and cooling blocks (146) and a control system, comprising a control board (154) with processor, an OLED board (142) and a substrate (140). It furthermore includes a digital video interface and an automatic addressing system The present invention further includes a method of initial assembly, automatic configuration, and calibration of the tiled OLED display and a method of replacing, adding, or removing one or more OLED tile assemblies in a larger tiled display.

An apparatus and method is disclosed for providing an extensible information handling system (IHS) bus implemented on predetermined channels of a digital video interface. IHS video signal information is multiplexed with IHS bus information by a host multiplexer for transmission across a digital video connector. The multiplexed IHS video signal and IHS bus information is received by a display multiplexer, where it is demultiplexed. Demultiplexed IHS video signal information is received by a video interface receiver, where it is used to generate an image on a digital display. Demultiplexed IHS bus information is received by a host bus interface transmitter / receiver, where it is used to support peripheral devices attached to the digital display.

A High Definition Multi-Media Interface (HDMI) cable may exhibit frequency dependent signal attenuation, inter symbol interference, and inter-pair skew. A boost device integrated with the cable can compensate for such impairments of the cable. A self calibrating cable with a boost device of the embodiment of the invention is described, in which parameters that control the response of the boost device are set optimally in a self-calibrating process comprising looping the boosted cable on itself through a calibration fixture that contains a calibration control device. The boost device includes pattern generators and a sampling circuit. Each high speed channel of the cable is separately tested and calibrated with the help of one of the other channels serving as a sampling channel. Additional embodiments provide for a selected replica boost device and a distinct pattern generator device in the calibration fixture.

An improved method and apparatus is disclosed for communicating control information between components of an audio / video system. Processing and control logic is implemented to transfer a plurality of data streams on predetermined channels of a digital video interface. A first data stream contains video data received by a video interface receiver, where it is used to generate an image on a digital display. A second data stream contains control data, which is similarly received by the video interface receiver, and is used to control source devices coupled to the digital display.

The present invention embodies high-accuracy white point adjustment with a simple circuit configuration according to an efficient algorithm in a display system for full digital processing. More particularly, the present invention is directed to a digital video interface 13 for inputting a digital video signal outputted from a host system and a liquid-crystal display monitor 11 for applying color conversion to the digital video signal inputted by the digital video interface 13 without using a look-up table, in which an adjusted-value input logic for inputting adjusted values at predetermined points to achromatic colors between maximum- and minimum-gray-scale achromatic colors and a controller LSI 22 for computing a digital video signal inputted by the digital video interface 13 so as to converge chromaticity coordinates for achromatic colors and outputting a computed digital value in a pipeline manner are used.

A system for providing television (TV) service including high definition television (HDTV) service, and for providing verification that a subscriber has connected an HDTV to the system includes a TV service provider headend and a set top box (STB). The HDTV may have an HDTV digital video interface (DVI) interconnect. The STB may be electrically coupled to the headend and have an STB DVI interconnect. When the HDTV DVI interconnect is initially electrically coupled to the STB DVI interconnect, the HDTV generally presents a data signal to the STB and the STB generally presents the data signal to the headend.

An HDMI cable may exhibit frequency dependent signal attenuation, inter symbol interference, and inter-pair skew. A boost device integrated with the cable can compensate for such impairments of the cable. A self calibrating cable with a boost device of the embodiment of the invention is described, in which parameters that control the response of the boost device are set optimally in a self-calibrating process comprising looping the boosted cable on itself through a calibration fixture that contains a calibration control device. The boost device includes pattern generators and a sampling circuit. Each high speed channel of the cable is separately tested and calibrated with the help of one of the other channels serving as a sampling channel.

The present invention relates generally to a method of controlling a high-speed Digital Video Interface (DVI) and digital video interface transmitter and receiver using the method. According to the present invention, it is possible to transmit data between DVI transmitter and receiver at high speed, incorrect operations occurring in the transmission channel are prevented, and hardware for high-speed transmission can be simply implemented.

A method and apparatus for transmitting / receiving multimedia data are disclosed. The method for transmitting / receiving multimedia data includes the steps of generating a High Definition Multimedia Interface (HDMI)-type data of 4-bits, encoding the 4-bits HDMI-type data into 10-bits TERC4 (Transition-Minimized Differential Signaling Error Reduction Coding-4) encoded values, converting the 10-bits TERC4 encoded values into 8-bits DVI (Digital Video Interface)-type data, transmitting the 8-bits DVI-type data, receiving the 8-bits DVI-type data, converting the received 8-bits DVI-type data into 10-bits TERC4 encoded values, decoding the 10-bits TERC4 encoded values into 4-bits HDMI-type data, and receiving the decoded HDMI-type data.

A computer system including a display having a digital receiving connector receiving a digital video signal according to a predetermined digital video interface, and a display module displaying a picture based on the digital video signal received from the digital receiving connector, a computer separated from the display and including a digital transmitting connector based on the digital video interface and a graphic controller outputting the digital video signal through the digital transmitting connector, and a digital video cable including a first video connector connected to the digital receiving connector and a second video connector connected to the digital transmitting connector, and through which the digital video signal is transmitted from the computer to the display. With this configuration, the present invention provides a computer system, in which a computer and a display are simplified in configurations, and loss in a video signal is decreased.

A High Definition Multi-Media Interface (HDMI) cable may exhibit frequency dependent signal attenuation, inter symbol interference, and inter-pair skew. A boost device integrated with the cable can compensate for such impairments of the cable. A self calibrating cable with a boost device of the embodiment of the invention is described, in which parameters that control the response of the boost device are set optimally in a self-calibrating process comprising looping the boosted cable on itself through a calibration fixture that contains a calibration control device. The boost device includes pattern generators and a sampling circuit. Each high speed channel of the cable is separately tested and calibrated with the help of one of the other channels serving as a sampling channel. Additional embodiments provide for a selected replica boost device and a distinct pattern generator device in the calibration fixture.

Methods and apparatus are provided for efficiently controlling source computers connected to a display system. A control computer, source computers, and a video processor are connected over a control network. Input signals such as keyboard and mouse input signals are provided to the video processor and the source computers through the control network. The source computers are also connected to the video processor through a video interface, such as multiple Digital Video Interface (DVI) lines. The use of a hybrid system allows flexibility in configuring and using the control network while providing high throughput and low latency for video sent to the video processor.

The invention discloses an airborne general video acquisition system. The system comprises a main acquisition unit and a plurality of auxiliary acquisition units, wherein the main acquisition unit comprises a power module I, a plurality of LSB bus function modules I, a plurality of HSB (home bus system) bus extension modules and a master control module which are sequentially connected; each auxiliary acquisition unit comprises a power module II, a plurality of LSB bus function modules II and an LSB extension module which are sequentially connected, the plurality of LSB bus function modules II include a DVI / VGA (digital video interface / video graphics array) acquisition and compression module, an LVDS (low voltage differential signaling) acquisition and compression module, a PAL (phase alteration line) acquisition and compression module, an SDI (serial digital interface) acquisition and compression module, a PCM (pulse code modulation) encoding module, a timing system module and a PCM acquisition module or extension record module respectively, and the LSB extension modules of the plurality of auxiliary acquisition units are connected with any one of the HSB bus extension modules of the main acquisition unit respectively. The airborne general video acquisition system acquires video signals of multi-channel display screens, lower displays and additional cameras on a plane simultaneously, thereby realizing multi-channel telemetering downloading of the video signals, facilitating flight monitoring, providing network output and local record and facilitating post-processing of flight data.

A digital video interface system and method for communicating digital video data from a source device to a sink device is provided, where the clock channel is used to transmit data as well as clock signals in a bi-directional, half-duplex manner using time division multiplexing. The digital video interface system comprises one or more data channels configured to transmit digital video data from the source device to the sink device in time divisional multiplexing including a plurality of first time slots and second time slots, and a clock channel configured to transmit a clock signal from the source device to the sink device in the first time slots and configured to transmit additional data from the source device to the sink device or from the sink device to the source device in the second time slots.

The invention discloses an interface converting circuit, a display panel driving method and a display device which are used for achieving the purpose of UHD image display through at least one LVDS interface combined with the UHD display device. The interface converting circuit comprises the LVDS interface and a data format conversion module. The LVDS interface is used for receiving LVDS signals from an LVDS signal source, and sending the LVDS signals to the data format conversion module. The data format conversion module is used for converting the received LVDS signals into eDP signals of a digital video interface.

A method for communicating digital display data and associated auxiliary processing data from a frame buffer to a post processor. The method includes storing the display data and the auxiliary processing data in the frame buffer, forming video scan lines from the frame buffer by handling both the display data and the auxiliary processing data as video data, and transferring the video scan lines over a digital video interface to a post-processor.

The invention discloses a road surface weather condition monitoring system which comprises a weather monitoring point device and a control terminal, wherein the weather monitoring point device comprises an overground weather monitoring unit, an earth surface state monitoring unit, a lightning protection device, a data acquisition circuit, a controller area network (CAN) bus, a CAN bus transceiving driver, a microprocessor, an RS232 communication interface circuit and a GSM / GPRS remote communication module. The control terminal is composed of a GSM / GPRS remote communication module, a monitoring display module and a personal computer (PC) work station, wherein the GSM / GPRS remote communication module is connected with the PC work station through the RS232 communication port, and the monitoring display module is connected with the PC work station through a digital video interface (DVI). The GSM / GPRS remote communication module of the weather monitoring point device is in wireless network data transmission with the GSM / GPRS remote communication module of the control terminal.

A digital video interface system and method for communicating digital video data from a source device to a sink device is provided, where the clock channel is used to transmit data as well as clock signals in a bi-directional, half-duplex manner using time division multiplexing. The digital video interface system comprises one or more data channels configured to transmit digital video data from the source device to the sink device in time divisional multiplexing including a plurality of first time slots and second time slots, and a clock channel configured to transmit a clock signal from the source device to the sink device in the first time slots and configured to transmit additional data from the source device to the sink device or from the sink device to the source device in the second time slots.

A High Definition Multi-Media Interface (HDMI) cable may exhibit frequency dependent signal attenuation, inter symbol interference, and inter-pair skew. A boost device integrated with the cable can compensate for such impairments of the cable. A self calibrating cable with a boost device of the embodiment of the invention is described, in which parameters that control the response of the boost device are set optimally in a self-calibrating process comprising looping the boosted cable on itself through a calibration fixture that contains a calibration control device. The boost device includes pattern generators and a sampling circuit. Each high speed channel of the cable is separately tested and calibrated with the help of one of the other channels serving as a sampling channel. Additional embodiments provide for a selected replica boost device and a distinct pattern generator device in the calibration fixture.

A digital video interface receiver adjusts a transfer function of a phase-locked loop circuit having a programmable charge pump, a programmable phase-locked loop filter, or a programmable gain voltage controlled oscillator. The digital video interface receiver monitors and detects errors in a data stream associated with the phase-locked loop circuit. Moreover, the digital video interface receiver changes the transfer function of the phase-locked loop circuit, in response to the detected errors, by changing parameters associated with the programmable charge pump, the programmable phase-locked loop filter, or the programmable gain voltage controlled oscillator of the phase-locked loop circuit so as to change the transfer function of the phase-locked loop circuit.

The invention discloses an LED lamp display and detection system, which is used for controlling display content of an LED lamp and detecting working parameters of the LED lamp. The LED lamp display and detection system comprises a control computer, a video signal processor, a network switch, a plurality of data distributors and a plurality of lamp detectors, wherein a digital video interface of the control computer is connected with an input end of the video signal processor; an output end of the video signal processor is connected with the input ends of the plurality of data distributors respectively; the data distributors are connected with at least one lamp detector; and the control computer is connected with the plurality of data distributors through the network switch respectively. According to the LED lamp display and detection system, transmission of video data and detection data can be achieved; display control and detection feedback of the LED lamp are simultaneously achieved; an alarm is timely given when necessary; the LED lamp does not need to be provided with an individual feedback chip; and the LED lamp display and detection system is simple in structure, low in production cost and high in universality, and can be widely applied to the LED lamp industry.

Methods and apparatus are provided for efficiently controlling source computers connected to a display system. A control computer, source computers, and a video processor are connected over a control network. Input signals such as keyboard and mouse input signals are provided to the video processor and the source computers through the control network. The source computers are also connected to the video processor through a video interface, such as multiple Digital Video Interface (DVI) lines. The use of a hybrid system allows flexibility in configuring and using the control network while providing high throughput and low latency for video sent to the video processor.

A front load keystone D-shape connector includes a D-shape connector body having a plurality of conducting terminals located on one side thereof, and a frame shell holding the D-shape connector body therein and mountable in one mounting slot on a keystone wall plate / keystone panel, the frame shell having hooks backwardly extended from a back side thereof and adapted for insertion into one mounting slot on a keystone wall plate / keystone panel from a front side for hooking on a part of the keystone wall plate / keystone panel inside the mounting slot. Thus, the invention enhances the application range and convenience of use of a D-subminiature / digital video interface connector.

A digital video interface receiver adjusts a transfer function of a phase-locked loop circuit having a programmable charge pump, a programmable phase-locked loop filter, or a programmable gain voltage controlled oscillator. The digital video interface receiver monitors and detects errors in a data stream associated with the phase-locked loop circuit. Moreover, the digital video interface receiver changes the transfer function of the phase-locked loop circuit, in response to the detected errors, by changing parameters associated with the programmable charge pump, the programmable phase-locked loop filter, or the programmable gain voltage controlled oscillator of the phase-locked loop circuit so as to change the transfer function of the phase-locked loop circuit.

A TMDS receiver includes a plurality of data channels, a clock channel, and an off-line mode detector. Each data channel receives a video signal and the clock channel receives a clock signal. Each data channel comprises a channel decoder for decoding the signals received by the corresponding receiving channel. The off-line mode detector detects an off-line mode detector, and then turns on a plurality of first data channels for a first predetermined period to determine an operation mode of video signal transmitted on said first data channels if the activity of the clock signal is valid. The off-line mode detector also activates a plurality of second data channels among the plurality of data channels according to the operation mode if the operation mode is determined as valid.

The invention discloses a verification platform and system. The verification platform comprises a programmable logic gate array (FPGA) and a program download interface, wherein the FPGA is used for conducting design verification on an intellectual property (IP) nucleus corresponding to integrated circuit design of a high-definition digital video interface; the program download interface is connected with the FPGA, and used for downloading the program corresponding to the IP nucleus into the FPGA. The technical problem that in correlation techniques, as no special verification platform aiming at the high-definition digital video interface IP is provided, the high-definition digital video interface IP is hard to verify accurately, is solved.

An image display device with dual-purpose interface consists of high clarity multimedia interface connector, high clarity multimedia interface receiving unit, external unit being in according with specification of digital video interface, digital sound signal connection terminal for receiving digital sound signal and for outputting received signal, selection unit for selecting one output from sound signals inputted by digital sound signal connection terminal and by high clarity multimedia interface receiving unit.

The invention belongs to the technical field of video information processing, and discloses a video image display method, apparatus and system based on the CameraLink protocol. The method comprises the following steps: receiving a frame of video data output by a camera through a CameraLink interface; extracting and storing a video image contained in the frame of video data; detecting the resolution of the video image; determining a resolution mode corresponding to the resolution of the video image; generating a corresponding DVI clock signal and a DVI image synchronization signal according to the resolution mode; and sending the DVI clock signal, the DVI image synchronization signal and the video image to a DVI display through a digital video interface DVI, so that the DVI display displays the video image according to the DVI clock signal and the DVI image synchronization signal. By adoption of the video image display method, apparatus and system disclosed by the invention, the video data output from the CameraLink interface can be directly converted into video data that can be identified by the DVI, so the video image output from the CameraLink interface can be displayed by using the DVI display without using a computer, thereby being convenient to implement.