Lane departure warning device based on single chip

Abstract

The invention relates to a lane departure warning device based on a single chip, which comprises a field programmable gate array (FPGA) chip unit, a digital camera and an external communication controller, wherein the FPGA chip unit is used for controlling the work of the digital camera, all lane departure warning calculation tasks are completed in the FPGA chip unit after the FPGA chip unit obtains the image information of the digital camera, and then, the external communication controller is controlled to implement the warning through the FPGA unit. The visual task of the lane departure warning is fast completed inside one chip through the large-scale parallel work characteristic of the FPGA chip, the characteristic of reconfigurability is also realized, further, the system performance is upgraded, and the expansion is very flexible.

Description

technical field [0001] The invention mainly relates to the field of vehicle active safety systems, in particular to a lane departure warning device which can be implemented on a programmable logic gate array (FPGA). Background technique [0002] With the increasing development of the automobile industry, automobiles have increasingly become an important part of social production and daily life. At the same time, the safety of automobiles has gradually become the focus of attention. According to statistics, about 75% of road traffic accidents are caused by human errors, and among these human-induced accidents, 19% are caused by unconscious lane deviation, and 26% are caused by forward rear-end collisions. . The occurrence of these two types of accidents is directly related to the driver's mental state, and ultimately manifests as the driver's inaccurate estimation of the vehicle's operating environment and the driver's reaction lag. [0003] At present, some practitioners ...

AI Technical Summary

Problems solved by technology

The advantage of this device is that it is very efficient, but it lacks versatility. The implementation of the algorithm is limited by the structure of the hardware, and there is no way to update the image processing algorithm.

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