Vertical parasitic PNP (plug-and-play) triode in BiCMOS (bipolar complementary metal oxide semiconductor) process and manufacturing method

A PNP triode, vertical parasitic technology, used in semiconductor/solid-state device manufacturing, transistors, electrical components, etc., can solve the problems of large device area, reduced device size, and large collector connection resistance, achieve high current amplification factor, improve Current gain, effect of reducing resistance
CN102569371BActive Publication Date: 2015-06-03SHANGHAI HUAHONG GRACE SEMICON MFG CORP

Patent Information

Authority / Receiving Office
CN ยท China
Patent Type
Patents(China)
Current Assignee / Owner
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
Publication Date
2015-06-03

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Abstract

The invention discloses a vertical parasitic PNP (plug-and-play) triode in a BiCMOS (bipolar complementary metal oxide semiconductor) process, a collector region is formed in a first active area; a pseudo buried layer is formed at the bottom of a shallow groove field oxide, transversely extends, enters into the first active area and is in contact with the collector region; the connection between the collector region and the adjacent active area is realized through the pseudo buried layer, and a collector is led out by forming metal contact at the top of the adjacent active area. N type polysilicon is formed at the upper part of a base region and a base is led out. An emitter region comprises a P type ion-implanted layer and a P type polysilicon formed above the base region. The invention further discloses a manufacturing method of the vertical parasitic PNP triode in the BiCMOS process. The vertical parasitic PNP triode disclosed by the invention can be used as an output device in a high-speed and high-gain BiCMOS circuit, one more device choice is provided for a circuit, the resistance of the collector of the PNP triode can be reduced, the frequency performance of the device can be improved, a polysilicon emitter can improve the gain of the device, and the production cost can also be reduced.
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Description

technical field

[0001] The invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a vertical parasitic PNP transistor in a BiCMOS process, and also relates to a method for manufacturing the vertical parasitic PNP transistor in the BiCMOS process. Background technique

[0002] In RF applications, higher and higher device characteristic frequencies are required. In BiCMOS process technology, NPN transistors, especially germanium-silicon heterojunction transistors (SiGe HBT) or germanium-silicon-carbon heterojunction transistors (SiGeC HBT) are good choices for UHF devices. And the SiGe process is basically compatible with the silicon process, so SiGe HBT has become one of the mainstreams of UHF devices. In this context, the requirements for the output device are correspondingly increased, such as having a current gain coefficient and a cutoff frequency not less than 15.

[0003] In the prior art, the output device can adopt a verti...

Claims

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