Programming method of split gate memory array
A storage array and programming method technology, applied in information storage, static memory, read-only memory, etc., can solve problems such as interference, memory unit b programming interference, non-target storage bit unit programming interference, etc., to reduce the possibility and reduce The effect of leakage current
Active Publication Date: 2017-05-10
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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Problems solved by technology
[0006] However, when programming the target storage bit cell s, the sector (sector) where the target storage bit cell s is located is taken as a unit, and the source voltage Vpp is applied to all source lines in the entire sector, so that the sector non-target memory bit cells generate program disturb
For example, the storage bit cell in the same column as the target storage bit cell s, such as the storage bit cell a, since the target storage bit cell s and the storage bit cell a are in the same sector, share the source voltage Vpp, although WLn-1 is biased as 0V, the channel of the storage bit cell a is in the off state, but there may still be a small amount of channel leakage current, which may cause unwanted programming to the storage bit cell a, thereby causing interference; similarly, with the target storage The storage bit cell in the same row as the bit cell s, such as the storage bit cell b, since the target storage bit cell s and the storage bit cell b are also in the same sector, the target storage bit cell s and the storage bit cell b share the source voltage Vpp and word Line WLn, although a higher operating voltage is applied to the bit line BLn+1 of the storage bit cell b to close the bit line channel of the storage bit cell b, there may still be a small number of channel leakage currents, so it is possible to Memory cell b generates program disturb
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[0029] The programming method of the split-gate memory array of the present invention will be described in more detail below in conjunction with schematic diagrams, wherein a preferred embodiment of the present invention is shown, and it should be understood that those skilled in the art can modify the present invention described here and still implement the present invention beneficial effect. Therefore, the following description should be understood as the broad knowledge of those skilled in the art, but not as a limitation of the present invention.
[0030] In the interest of clarity, not all features of an actual implementation are described. In the following description, well-known functions and constructions are not described in detail since they would obscure the invention with unnecessary detail. It should be appreciated that in the development of any actual embodiment, numerous implementation details must be worked out to achieve the developer's specific goals, such ...
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The invention discloses a programming method for separating a grid memory array. The programming method comprises the following steps of: at a preprogramming stage, applying a preprogramming voltage to word lines within a sector where a target memory bit unit is arranged, applying a work voltage to all the word lines, and applying the work voltage to source electrode wires within the sector where the target memory bit unit is arranged, so that the mis-programming to a non-target memory bit unit in the stage of programming can be avoided or reduced; and at a programming stage, applying a word line programming voltage to the word lines of the target memory bit unit, applying a bit line programming voltage to a bit line of the target memory bit unit, applying the source electrode programming voltage to the source electrode wires of the target memory bit unit, and programming the target memory bit unit. According to the programming method for separating the grid memory array, the interference to the non-target memory bit unit can be reduced when the target memory bit unit is programmed.
Description
technical field [0001] The invention relates to the field of memory technology, in particular to a programming method for a split-gate memory array. Background technique [0002] As a kind of integrated circuit storage device, flash memory (flash memory) has the function of electrically erasable and writable storage information, and the stored information will not be lost after power failure. Therefore, flash memory is widely used such as portable computer , mobile phones, digital music players and other electronic products. Generally, according to different gate structures, flash memory is divided into two types: stacked gate flash memory and split gate flash memory. Arranged, each storage bit unit is used to store a single bit of data. [0003] figure 1 It is a schematic diagram of a cross-sectional structure of a split-gate flash memory sharing a source line, figure 1 It is a storage unit, and one storage unit has two storage bit units, which are respectively the firs...
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IPC IPC(8): G11C16/10G11C16/06
Inventor张雄
OwnerSHANGHAI HUAHONG GRACE SEMICON MFG CORP