Double-edge D flip-flop based on N type SABL logic

A double-edge and flip-flop technology, applied to electric pulse generator circuits, pulse generation, electrical components, etc., can solve the problems that SABL logic circuits cannot directly use D flip-flops, and the power consumption of single-edge flip-flops does not have balance characteristics. , to achieve the effect of constant power consumption and power consumption balance

CN103595371AInactive Publication Date: 2014-02-19NINGBO UNIV
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Publication Date
2014-02-19
Estimated Expiration
Not applicable · inactive patent

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Abstract

The invention discloses a double-edge D flip-flop based on N type SABL logic. The double-edge D flip-flop comprises a first transmission gate, a second transmission gate, a third transmission gate, a fourth transmission gate, a fifth transmission gate, a sixth transmission gate and two N type SABL logical units. The double-edge D flip-flop has the advantages that the two N type SABL logical units and the six transmission gates are adopted for designing the double-edge D flip-flop, in the Cadence environment, by the adoption of a TSMC 0.13-micrometer CMOS technology, analog simulation is performed on the double-edge D flip-flop based on the N type SABL logic, an analog result shows that a circuit has a correct logical function, by analyzing power consumption curves of the double-edge D flip-flop based on the N type SABL logic, it can be known that in every clock period, the power consumption curves of the double-edge D flip-flop are the same, power consumption is constant, and the double-edge D flip-flop has a power balance characteristic and achieves the characteristic of resisting to bypass attacks.
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Description

Technical field

[0001] The invention relates to a D flip-flop, in particular to a double-edge D flip-flop based on N-type SABL logic. Background technique

[0002] The Differential Power Analysis (DPA) attack was proposed by Kocher et al. in 1998. It relies on the power consumption of the circuit in the encryption process of the encryption hardware and the association with the data it processes and the operations performed. The power consumption curve in the encryption process uses statistical methods and the experience of the attacker to analyze the collected information to obtain data related to the encrypted information, posing a major threat to the security of the existing cryptographic module. Power balance technology can fundamentally solve the problem of power consumption leaking password information, and is the preferred technology to defend against DPA attacks in recent years. The power balance technology uses Hamming extended coding for re-encoding, for example, bit "0...

Examples

Embodiment

[0019] Example: such as Figure 4 As shown, a double-edge D flip-flop based on N-type SABL logic includes a first transmission gate T1, a second transmission gate T2, a third transmission gate T3, a fourth transmission gate T4, a fifth transmission gate T5, and a sixth transmission gate. Transmission gate T6 and two N-type SABL logic cells, the two N-type SABL logic cells are the first N-type SABL logic cell and the second N-type SABL logic cell, the first N-type SABL logic cell and the second N-type SABL logic cell The logic unit has a signal input terminal, a complementary signal input terminal, a signal output terminal, a complementary signal output terminal, a power signal input terminal, a first clock signal input terminal and a second clock signal input terminal. The signal of the first N-type SABL logic unit The input terminal is connected to the signal input terminal of the second N-type SABL logic unit and its connection terminal is the signal input terminal of the doub...