Double-edge D flip-flop based on N type SABL logic

Abstract

The invention discloses a double-edge D flip-flop based on N type SABL logic. The double-edge D flip-flop comprises a first transmission gate, a second transmission gate, a third transmission gate, a fourth transmission gate, a fifth transmission gate, a sixth transmission gate and two N type SABL logical units. The double-edge D flip-flop has the advantages that the two N type SABL logical units and the six transmission gates are adopted for designing the double-edge D flip-flop, in the Cadence environment, by the adoption of a TSMC 0.13-micrometer CMOS technology, analog simulation is performed on the double-edge D flip-flop based on the N type SABL logic, an analog result shows that a circuit has a correct logical function, by analyzing power consumption curves of the double-edge D flip-flop based on the N type SABL logic, it can be known that in every clock period, the power consumption curves of the double-edge D flip-flop are the same, power consumption is constant, and the double-edge D flip-flop has a power balance characteristic and achieves the characteristic of resisting to bypass attacks.

Description

Technical field [0001] The invention relates to a D flip-flop, in particular to a double-edge D flip-flop based on N-type SABL logic. Background technique [0002] The Differential Power Analysis (DPA) attack was proposed by Kocher et al. in 1998. It relies on the power consumption of the circuit in the encryption process of the encryption hardware and the association with the data it processes and the operations performed. The power consumption curve in the encryption process uses statistical methods and the experience of the attacker to analyze the collected information to obtain data related to the encrypted information, posing a major threat to the security of the existing cryptographic module. Power balance technology can fundamentally solve the problem of power consumption leaking password information, and is the preferred technology to defend against DPA attacks in recent years. The power balance technology uses Hamming extended coding for re-encoding, for example, bit "0...

AI Technical Summary

Problems solved by technology

In a single-edge trigger, the clock edge in one direction will become a redundant change, and its power consumption is redundant power consumption. Therefore, the power consumption of a single-edge trigger does not have balance characteristics, and SABL logic circuits cannot be directly used in traditional D flip-flop design

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