Finned active area manufacturing method

An active area and fin-type technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of rounding of the top of the active area, plasma damage, and difficulty, so as to reduce process difficulty and cost, The effect of simplifying the process integration scheme and avoiding plasma damage

Inactive Publication Date: 2014-06-25
SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT
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AI Technical Summary

Problems solved by technology

The disadvantage of this method is that the pattern of the active region is formed by direct photolithography, which is likely to cause the top of the active region to be rounded, and the sidewall of the fin-type active region as a channel is easily damaged by the etched plasma.
On the other hand, the isolation process for forming the isolation layer is relatively complicated. When filling the isolation layer isolation medium, it is necessary to ensure that no holes and other types of defects are generated. The process requirements are high and difficult, and plasma damage may also be introduced.

Method used

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Embodiment Construction

[0024] In order to make the content of the present invention clearer and easier to understand, the content of the present invention will be further described below in conjunction with the accompanying drawings. Of course, the present invention is not limited to this specific embodiment, and general replacements known to those skilled in the art are also covered within the protection scope of the present invention.

[0025] image 3 It is a flow chart of the steps of the method for preparing the fin-type active region provided by the present invention.

[0026] Such as image 3 As shown, the fin-type active region preparation method provided in this specific embodiment includes the following steps:

[0027] Step S1: providing a semiconductor substrate. The semiconductor substrate may be silicon on which semiconductor devices are formed, silicon-on-insulator (SOI) on which semiconductor devices are formed, or II-VI or III-V compound semiconductors on which semiconductor devic...

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Abstract

The invention discloses a finned active area manufacturing method. The method includes the following steps of providing a semiconductor substrate, forming an isolation layer on the semiconductor substrate, etching the isolation layer to form a groove which allows the semiconductor substrate to be exposed, and forming a finned active area in the groove by growing single crystal semiconductor materials in an epitaxial mode, wherein the finned active area is provided with a portion protruding out of the top face of the isolation layer. According to the finned active area manufacturing method, the active area can be prevented from being affected by top rounding, plasma damage and the like, process difficulty is lowered, and cost is reduced.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a method for preparing a fin-type active region. Background technique [0002] As the feature size of semiconductor devices shrinks proportionally according to Moore's law, and the integration level of chips continues to increase, many negative effects appear, making it difficult for traditional planar bulk silicon MOS devices to regenerate due to short-channel effects, device leakage, and fluctuations. Meet the performance and power requirements of devices and circuits. In recent years, a new type of device structure, Fin-type field-effect transistors (FinFETs), has a three-dimensional device structure that significantly suppresses the short-channel effect of the device, and has better gate control capabilities and flexible control of double gates. more and more people's attention. The main difference between a FinFET and a planar MOSFET structure is that its channel is...

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Application Information

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Patent Type & AuthorityApplications(China)
IPC IPC(8): H01L21/336
CPCH01L29/1037
Inventor李铭储佳
OwnerSHANGHAI INTEGRATED CIRCUIT RES & DEV CENT