28 results about "Device leakage" patented technology

According to the embodiment of the invention, leakage characteristic data of a plurality of sensors are collected in real time; performing filtering processing on the leakage characteristic data and then determining an area where a leakage source of the vacuum equipment is located; determining the confidence coefficient of the area where the leakage source is located, determining the confidence coefficient of the position of the leakage source based on the confidence coefficient of the area where the leakage source is located, and giving an alarm when the confidence coefficient of the position of the leakage source reaches a confidence threshold value; and injecting helium to the leakage source position of the vacuum equipment in a preset time period to perform calibration test, calculating a calibration error of the leakage source position of the vacuum equipment, and when the calibration error exceeds an error threshold value, recalculating the confidence coefficient of the leakage source position and resetting the confidence coefficient threshold value. The problems of high cost, low detection precision, slow response speed, dependence on artificial experience and incapability of real-time monitoring due to long-time use of a helium mass spectrum detection method when leakage positioning detection is performed on a leakage source of vacuum equipment in the prior art are solved.

The invention discloses an electronic device structure and a preparation method and application thereof. The preparation method of the electronic device structure comprises the following steps: providing a first semiconductor layer of a first conduction type, and forming at least one groove-shaped structure in a selected region of the first semiconductor layer; an electric field suppression layer is formed in the groove-shaped structure, the electric field suppression layer is distributed in a groove bottom corner area of the groove-shaped structure, a round transition structure for connecting the side wall and the groove bottom is formed, and / or the electric field suppression layer continuously covers the side wall, the groove bottom and the groove bottom corner area of the groove-shaped structure and serves as an epitaxial interface for epitaxial growth of a second semiconductor layer; and epitaxially growing a second semiconductor layer of a second conduction type in the groove-shaped structure. The electric field suppression layer is formed in the groove-shaped structure for performance reinforcement, electric field concentration is relieved, a peak electric field is reduced, and electric leakage of the device is reduced.

This application relates to the field of intelligent monitoring technology and discloses a sealed wearable animal device, including a circuit board, a base support, and a sealed shell. The electronic components on the circuit board include a battery and functional components; the base support includes a battery cavity, and the circuit board and electronic components are fixed to the base support; the sealed shell encloses the base support, and the sealed shell and base support together completely enclose the circuit board and electronic components; the base support is formed by a first injection molding process on the circuit board, and the sealed shell is formed by a second injection molding process using the same material on the combination of the base support, circuit board, and electronic components, with no gaps at the junction of the base support and the sealed shell. This application can solve the problem of device leakage failure and improve the sealing life.

The application belongs to the technical field of IGBT device leakage detection, and specifically discloses an IGBT tube leakage detection method, device, medium and equipment. The method comprises the following steps: collecting leakage data of each terminal of an IGBT tube to be detected; constructing a leakage detection model and training the same; and after preprocessing the collected leakage detection data, inputting the same into the trained leakage detection model to detect whether the IGBT tube to be detected has a leakage abnormality. The application can improve the leakage detection precision of the IGBT tube by constructing the leakage detection model.

Embodiments of the present application provide a heterojunction bipolar transistor, a preparation method thereof, a radio frequency amplifier and a radio frequency module. The heterojunction bipolar transistor comprises an isolation region, the isolation region has a substrate and a semiconductor layer stacked on the substrate, the isolation region is further provided with a collector contact layer, the substrate is provided with a back hole corresponding to the collector contact layer, the back hole is provided with a first metal layer electrically connected with the collector contact layer, and the semiconductor layer is provided with an isolation groove around the collector contact layer, and the depth of the isolation groove is greater than or equal to one half of the thickness of the semiconductor layer. In this embodiment, the isolation groove is arranged around the collector contact layer corresponding to the back hole on the semiconductor layer, the leakage path of the device is isolated by the isolation groove, the risk of device leakage of the heterojunction bipolar transistor is reduced, and the product performance of the heterojunction bipolar transistor is improved.

The utility model discloses a semiconductor device, a power module, a power conversion circuit and a vehicle, the semiconductor device comprises a semiconductor body, the semiconductor body comprises a first surface and a second surface which are oppositely arranged, the semiconductor body also comprises a plurality of first areas and a plurality of second areas, the first areas and the second areas are arranged on the first surface, and the first areas and the second areas are arranged on the second surface; the second regions extend into the semiconductor body and are located between the adjacent first regions; the semiconductor structure layer is located on the first surface, and the orthographic projection of the semiconductor structure layer on the first surface at least covers the orthographic projection of the second area on the first surface; the semiconductor structure layer and the second region have the same conduction type; the first metal layer is located on one side, away from the first surface, of the semiconductor structure layer; and the second metal layer is located on the second surface, so that the forward on resistance of the device is reduced, the leakage current of the device is further reduced, and the performance and the stability of the semiconductor device are improved.

The invention relates to the technical field of hydrogen energy storage, in particular to a leakage blocking assembly and hydrogen energy storage equipment, according to the technical scheme, the leakage blocking assembly comprises a blocking mechanism, the blocking mechanism is provided with a blocking valve, a spiral pipe, a material storage barrel, an electric heating clamp and a lithium battery which can only be opened manually, the blocking valve is of a double-sealing structure, and a valve element is coated with a hydrogen blocking coating; a self-locking mistaken touch prevention structure is further arranged; the hydrogen energy storage equipment comprises a protection mechanism, a hydrogen storage mechanism, the leakage blocking assembly and a cooling mechanism, the protection mechanism comprises an anti-collision frame and the like, the hydrogen storage mechanism comprises a hydrogen storage tank and the like, the cooling mechanism comprises a liquid cooling pump body and the like, the base is provided with a groove matched with the hydrogen storage tank, an energy absorption buffer layer is arranged on the inner wall of the anti-collision frame, and the hydrogen storage tank is lined with a graphene or palladium alloy film. And the circulating pipe is a dual-channel redundant loop and is provided with a leakage monitoring component. The problems that an existing equipment leakage blocking assembly is insufficient in sealing, treatment after leakage is not timely, and potential safety hazards are likely to be caused by environmental factors are solved.

This invention discloses a method, system, electronic device, and storage medium for measuring hydrogen leakage rate, relating to the field of hydrogen safety utilization technology. The method includes: calculating the acoustic signal and signal phase difference corresponding to the target device based on an ultrasonic sensor array; obtaining a predicted nozzle aperture based on the acoustic signal, signal phase difference, and a first conversion model determined by a deep learning algorithm; obtaining a predicted gas pressure based on the acoustic signal, signal phase difference, and a second conversion model determined by a deep learning algorithm; and calculating the hydrogen leakage rate at the leak point of the target device based on the predicted nozzle aperture and gas pressure. This invention can accurately predict the hydrogen leakage rate, thus laying the foundation for predicting the amount of hydrogen leakage and the timing of early warnings.

The utility model discloses a device leakage current testing device, and relates to the technical field of current testing, the device leakage current testing device comprises a device main body, the device leakage current testing device is also provided with a portable mechanism, the portable mechanism comprises a handle, two support plates and two bottom plates, and when the device main body needs to move, the portable mechanism can move on the support plates. The long blocks in the support plate are moved out, the telescopic blocks in the two long blocks are moved out, the threaded rod corresponds to the grip, the grip is rotated, the grip is in threaded sleeving connection with the threaded rod, the grip is connected with the threaded rod, a worker directly holds the grip at the moment, the purpose of taking the device body is achieved, and the flexibility of the worker in the carrying process is improved; and when the telescopic block moves in the long block, the limiting block can also move along the third rectangular groove, and when the telescopic block moves by a certain distance, the limiting block can abut against the inner wall of the long block, so that the telescopic block cannot continue to move, and the problem that the telescopic block is separated from the long block due to excessive movement of the telescopic block is avoided.

The application discloses a kind of six fluorine sulfur filled electrical equipment leakage management devices, including basic unit, sealing unit and clamping unit, wherein basic unit, including sealing body, connecting piece is connected to the one end of the sealing body.This six fluorine sulfur filled electrical equipment leakage management device, by sealing assembly is clamped between connecting piece and sealing body, by using manual wheel, let first clamping assembly clamp sealing shell and reduce gap, while, liquid guide assembly also carries out liquid guide, and the gap between sealing body and connecting piece is blocked by plugging glue, then, drainage is carried out using drainage device, to reduce the pressure of six fluorine sulfur gas on plugging glue, improve plugging success rate, after solidification, it can be covered with end, around leakage point using drainage device forms a closed space, reduces the pressure of leakage gas, improves the bonding quality of plugging glue, simultaneously, through drainage end, the sealing of closed space is realized, finally, through reinforcing glue, overall sealing is realized, to achieve the purpose of plugging.

The invention discloses a running state intelligent management system and method for environmental protection equipment, and relates to the technical field of intelligent management. The system comprises a partition deployment module, a leakage monitoring module, a plugging switching module and an early warning operation and maintenance module. The partition deployment module is divided into independent partitions, and a leakage monitoring sensor, a partition plugging actuator and a standby access assembly are deployed; the leakage monitoring module configures a sampling frequency and a leakage threshold value, and collects and compares leakage characteristic signals; after the plugging switching module verifies leakage, local plugging is executed, and a standby channel is switched to guarantee medium circulation; the early warning operation and maintenance module accurately locates a leakage position, calculates a risk level, and pushes early warning information containing a partition identifier and an accurate position. Through partitioned hardware direct connection and quantitative adaptation logic, the problems of difficult leakage traceability, blocking lag and global shutdown pain points of the environmental protection equipment are solved, instant leakage management and control, continuous operation and precise operation and maintenance of the equipment are realized, and the environmental governance effect and the equipment operation efficiency are guaranteed.

The application provides a method for improving leakage of low-voltage devices in a metal gate high-voltage device integration process, comprising the following steps: S1, providing a substrate, wherein the substrate comprises a low-voltage device area, a medium-voltage device area and a high-voltage device area; S2, etching back active areas of the medium-voltage device area and the low-voltage device area; S3, forming a first gate oxide layer in the medium-voltage device area and the low-voltage device area; S4, removing the first gate oxide layer in the low-voltage device area; and S5, forming a second gate oxide layer in the low-voltage device area. The active areas of the medium-voltage device area and the low-voltage device area are etched back simultaneously, avoiding consumption of isolation components of the low-voltage device area caused by etching back the high-voltage device area and the medium-voltage device area alone, ensuring that the isolation components of the low-voltage device area are higher than the active area, and not increasing the leakage of the low-voltage device.

The invention relates to an isolation type MOSFET device structure capable of reducing device electric leakage and a preparation method. The device structure comprises a substrate, an epitaxial region, a deep isolation well, an ion implantation well, a source region, a drain region, an isolation region, a body region, a region, source electrode metal, drain electrode metal, isolation region electrode metal, body electrode metal, region electrode metal, a gate oxide layer and a gate electrode. The epitaxial region is located on the substrate; the deep isolation well extends into the epitaxial region from the surface of the epitaxial region; the ion implantation well extends into the deep isolation well from the surface of the deep isolation well; the source region, the drain region and the body region extend from the surface of the ion implantation well to the interior of the ion implantation well; the isolation region extends into the deep isolation well from the surface of the deep isolation well; the region extends from the surface of the epitaxial region to the interior of the epitaxial region; the gate oxide layer is located on the ion implantation well; the gate electrode is located on the gate oxide layer. According to the structure, the leakage current of the device is reduced, and the breakdown resistance and crosstalk resistance of the device are improved.

The application discloses a 4H-SiC epitaxial structure for controlling TSD defects and a growth method thereof, and belongs to the technical field of semiconductors.The 4H-SiC epitaxial structure for controlling TSD defects comprises a 4H-SiC substrate and an epitaxial buffer layer I, a 4H-SiC buffer layer II and a 4H-SiC drift layer which are sequentially grown on the 4H-SiC substrate; and the epitaxial buffer layer I is a 6H-SiC buffer layer or a 4H-SiC buffer layer I.The 4H-SiC epitaxial structure for controlling TSD defects has the beneficial effects that the TSD defect and TSD derived defect densities can be effectively reduced, the device leakage current is reduced, the device reverse breakdown voltage is increased, and the quality of the epitaxial wafer is improved.

This invention discloses a noise-reducing, vibration-resistant, and cavitation-preventing regulating ball valve. The invention relates to the field of ball valve technology. A flange block near the composite component connects to a pipeline. Liquid flows from one side of the composite component to the other side of the valve body, forming a liquid flow path. During the process of fixing the flange block to the pipeline, the composite component enters the pipeline along with the pipeline, fitting against the inner wall of the connecting pipeline. When the liquid flows, it enters the valve body from the composite component. A drive motor controls the connecting shaft to rotate, which in turn drives the valve ball to rotate, causing the valve ball to rotate inside the valve body, thereby achieving the function of closing the liquid flow. During the rotation of the valve ball, it rubs against the friction component, cleaning the surface of the valve ball to reduce impurity accumulation, prevent gaps between the valve ball and the inner wall of the valve body, reduce the probability of equipment leakage, and thus extend the service life of the equipment.

The utility model relates to a leaky cable device and intrusion detection equipment. The leaky cable device comprises a transmitting cable and a receiving cable. And the length direction of the receiving cable is correspondingly coupled with the length direction of the transmitting cable. And the radial distance between the receiving cable and the transmitting cable is not greater than 0.5 m. The emission holes are distributed at intervals in the length direction. The first shielding layer is correspondingly provided with a transmitting hole between the two adjacent receiving holes along the length direction, and for a midpoint between the two adjacent receiving holes along the length direction, the length of the receiving cable between the midpoint and the transmitting hole is smaller than the length of the receiving cable between the transmitting hole and any one of the two adjacent receiving holes. Even if the radial distance between the receiving cable and the transmitting cable is small, the sufficient distance between the transmitting hole and the receiving hole can still be kept, the situation of close-range coupling of the first wire core and the second wire core is avoided, an electromagnetic field received by the second wire core is kept sensitive to an invasion target, and the detection accuracy is ensured.

A clean air insulated electrical equipment leakage simulation device and detection method are provided. One end of a GIL busbar is connected to a clean air charging device and a tracer gas charging device via an air charging pipeline and a three-way valve. A simulated leakage point is set on the GIL busbar, and a digital pressure gauge is provided on the air charging pipeline. Clean air is charged into the vacuum GIL busbar. When the digital pressure indication value reaches the rated pressure of the GIL busbar, the clean air charging is stopped. Tracer gas is charged into the GIL busbar filled with clean air. When the digital pressure indication value reaches the tracer gas partial pressure, the tracer gas charging is stopped. The simulated leakage point is connected to a leakage simulation gas circuit to simulate leakage. The time when different concentrations of tracer gas are detected at each simulated leakage point is recorded. The numerical relationship between the concentration of the tracer gas and the diffusion speed and direction in the GIL busbar is fitted. The present invention realizes leakage point detection of clean air insulated electrical equipment and provides data reference for subsequent on-site addition of tracer gas leak detection.

The invention provides a flash memory device and a preparation method thereof, in the preparation method, a traditional bit line and word line polycrystalline silicon etching mask layout is changed, only bit line polycrystalline silicon of a storage area and a leading-out area is opened, and word line polycrystalline silicon of the leading-out area is not opened, so that the manufacturing cost of the flash memory device is reduced. Etching mode of simultaneously adopting non-selection-ratio plasma etching process to etch bit line polycrystalline silicon with partial thickness of storage region and extraction region and first dielectric layer with partial thickness close to two sides of the bit line polycrystalline silicon and adopting high-selection-ratio chemical dry etching process to etch and remove bit line polycrystalline silicon with residual thickness in first groove below opening Therefore, the problem of electric leakage of the device caused by the fact that plasma is too heavy to damage the floating gate layer on the bit line polycrystalline silicon side in the traditional preparation process of plasma etching of the bit line and the word line polycrystalline silicon can be avoided, the damage to the film of the floating gate layer on the bit line polycrystalline silicon side is reduced, and the reliability of the flash memory device is improved.

The present invention provides a memory and a method for manufacturing the memory. Bitline trenches are formed by patterning a dielectric layer on a substrate, and then a bitline spacer and a bitline structure are formed within the bitline trenches. Compared to existing technologies, the present invention forms the bitline trenches first and then the bitline structure, eliminating the steps of forming a bitline contact window and then forming a bitline contact plug within the bitline contact window. This prevents conductive material from remaining at the bottom of the bitline contact window when etching to form the bitline contact plug, thus avoiding device leakage current issues and improving device performance.

The present application discloses a device leakage current test method. The method includes: applying a gradually increasing first gate voltage within a range to a gate of the MOS transistor; applying a first drain voltage to a drain of the MOS transistor; reapplying a gradually increasing second gate voltage within a range to the gate of the MOS transistor; reapplying a second drain voltage to the drain of the MOS transistor; reapplying a gradually increasing third drain voltage in a range to the drain of the MOS transistor; detecting a variation of the drain current as the first leakage current; and reapplying a gradually increasing fourth drain voltage to the drain of the MOS transistor, with a step of 0.04 V and a variation range; and detecting a variation of the drain current as the second leakage current.

The application provides a trench terminal connection ground buried layer SiC JBS diode and a preparation method thereof. The diode comprises, from bottom to top, a cathode, a substrate, a buffer layer, a first epitaxial layer, a second epitaxial layer, and an anode located on the surface of the terminal transition ring of the second epitaxial layer. The first epitaxial layer comprises, inside and close to one side of the second epitaxial layer, a ground buried layer located in a preset area and a terminal transition ring located outside the preset area. In the direction perpendicular to the plane where the substrate is located, the orthographic projection of the second epitaxial layer and the orthographic projection of the terminal transition ring do not overlap. The side of the second epitaxial layer, inside and far away from the first epitaxial layer, comprises a main junction. Since the ground buried layer accelerates the discharge of excess carriers, effectively modulates the peak electric field distribution inside the device, reduces the electric field at the epitaxial / substrate homojunction, and further reduces the collision ionization at the homojunction, the single event transient current and the transient temperature are effectively reduced, and the threshold of the device leakage degradation is improved.

The application relates to the technical field of semiconductors, and particularly discloses an ESD protection device with a folding trigger mechanism and a preparation method thereof. The method comprises a P-type substrate; an N-type well layer and a P-type well layer formed in the substrate; at least one P-type doped layer formed on the surface of the N-type well layer; at least one N-type doped layer formed on the surface of the P-type well layer; a third groove arranged between the N-type well layer and the P-type well layer; and a suspended electric field modulation structure arranged on the third groove. The application introduces the suspended electric field modulation structure, realizes dynamic electric field regulation of the SCR trigger process without increasing the device leakage and changing the main discharge path, and makes the device have low trigger voltage, moderate holding voltage, excellent large-current discharge capacity and good static reliability.

A semiconductor structure and a method of forming the same, the method comprising: providing a substrate including a substrate and a fin structure separated from the substrate, the fin structure including a bottom fin, a sacrificial layer on the bottom fin, and a top fin on the sacrificial layer; forming an isolation layer around the bottom fin on the substrate; forming a dummy gate structure across the top fin on the isolation layer; removing the sacrificial layer on both sides of the dummy gate structure to form a gap between the bottom fin and the top fin and the remaining sacrificial layer; forming a dielectric layer sealing the gap; after forming the dielectric layer, forming source / drain doped regions in the top fin on both sides of the dummy gate structure; removing the dummy gate structure to form a gate opening; removing the remaining sacrificial layer through the gate opening to form a via in communication with the gate opening; and filling the gate opening and the via with a gate structure surrounding the top fin. The present application reduces device leakage current and improves the control of the gate structure over the conductive channel.

This invention provides an epitaxial structure and a semiconductor device employing the epitaxial structure. The epitaxial structure includes, for example, a semiconductor substrate, a heteroepitaxial stack, and a high-resistivity buffer layer located between the semiconductor substrate and the heteroepitaxial stack. The heteroepitaxial stack is used to provide a conductive channel by constructing a two-dimensional electron gas and includes a gallium nitride channel layer and a barrier layer. The high-resistivity buffer layer includes a boron nitride layer, an aluminum nitride layer, and an aluminum boron nitride layer located between the boron nitride layer and the aluminum nitride layer. Embodiments of this invention reduce the possibility of breakage by optimizing the buffer layer material and layer structure to achieve high crystal quality and high resistance, thereby effectively reducing device leakage current and improving device breakdown voltage characteristics.

The invention discloses construction and application of a pressure and displacement dual-channel leakage rate calculation model, and the method comprises the steps: dividing a leakage risk region of target equipment, and synchronously collecting pressure and displacement real-time data to obtain dual-source monitoring data; performing time-frequency combined processing on the double-source data to generate feature associated data; establishing a signal-leakage response mapping model according to the characteristic association data and the structure data, analyzing leakage medium diffusion characteristics and tracking a path, and generating propagation dynamic data; analyzing the leakage rate influence factors to generate rate influence characteristic data, defining an influence range, performing multi-physics field coupling calculation, and generating field domain coupling data; and constructing a two-channel model to predict the leakage rate, identifying a leakage stage based on prediction data, correcting monitoring parameters, and generating monitoring control feedback data. The model is applied to an industrial equipment leakage dynamic monitoring system, the leakage rate can be accurately calculated, dynamic monitoring is achieved, and the monitoring accuracy and real-time performance are improved.

The application provides a MIM capacitor and a manufacturing method thereof, which comprises the following steps: providing a substrate; forming an adhesion layer on the substrate; forming a lower electrode on the adhesion layer; pre-treating the lower electrode by using an atomic layer deposition system; forming an STO layer on the pre-treated lower electrode in situ; performing a rapid thermal annealing treatment to crystallize the STO layer; and forming an upper electrode on the STO layer. By forming the adhesion layer between the substrate and the lower electrode, the device structure is stable and reliable. By pre-treating the lower electrode by inert ions before forming the STO layer, the organic matters existing in the interface of the lower electrode are effectively reduced, the formation of strontium carbonate is effectively reduced in the initial growth stage of the STO layer, the growth quality of the STO layer is improved, and the device leakage is improved, thereby solving the problem of how to reduce the leakage current of the MIM capacitor.

The invention discloses a process method for improving electric leakage of an SGT power device, and belongs to the technical field of semiconductor device manufacturing. According to the technical scheme, the method comprises the following steps: firstly, providing a substrate with a deep trench, and then forming a deep trench protection layer, HDP filling, HDP etching and other multi-step processes through a thermal oxidation process and CVD film forming in sequence, and forming a gate insulation oxide layer with a thicker bottom by utilizing the high selection ratio of etching, thereby effectively improving the voltage endurance capability of a bottom gate and preventing the device from being broken down. And subsequently completing related processes of the first gate and the second gate and formation of a body region and a source region. According to the process method, the electric leakage problem of the SGT power device can be remarkably solved, the performance of the device is improved, and the process method has important application value in the field of power device manufacturing.

The present disclosure provides a method of determining a leakage of a semiconductor manufacturing tool. The method includes: placing a substrate including a material layer on the substrate into a chamber of the semiconductor manufacturing tool; delivering a gas into the chamber to react with the material layer; obtaining a gas composition inside the chamber; and comparing the gas composition to a referential gas composition. The leakage is determined to exist if the gas composition is substantially different from the referential gas composition.