A solid state disk adaptive error correction method and system

Abstract

The invention discloses an internal self-adaptive LDPC error correction method of a solid-state disk, including (1) initialization: the solid-state disk performs a block erasing operation before inputting data, and initializes error correction code identifiers of all erased blocks; (2) ) Adaptive error correction coding for solid-state disks: encode the written original data to generate codewords; (3) The decoding process of solid-state disks includes: (3.1) judging whether there is a read operation, and if there is a read operation, turn to (3.2) , otherwise end; (3.2) Judging whether the error correction code identifier Bi of the block i where the read page is located is 0; (3.3) If Bi is 0, then all pages in the block i use weak LDPC codes for error correction; (3.4) Solid state disk adaptive error correction code switching operation; (3.5) If Bi is 1, all pages in block i use strong LDPC codes for error correction. The invention is applicable to the field of solid-state disk error correction, and improves the reliability of LDPC error correction performance and stored data.

Description

technical field [0001] The invention belongs to the technical field of solid-state disk error correction, and in particular relates to a solid-state disk self-adaptive error correction method and system. Background technique [0002] With the popularization of various electronic devices in daily life, solid-state disks are widely used as a storage device, and it is increasingly important to ensure the security of data in the solid-state disks. As an important measure to ensure data security, it is very important to maximize the efficiency of the error-correcting code. [0003] The manufacturing process of the flash memory chip inside the solid-state disk has been developed to the level of 10 nanometers, which means that the cell size inside the flash memory chip is getting smaller and smaller, and the noise is correspondingly increased, requiring more powerful error correction codes. A flash memory chip consists of multiple structural levels. The smallest read / write unit is...

AI Technical Summary

Problems solved by technology

Under normal circumstances, SSDs use the LDPC code with the strongest error correction capability to ensure the data security of the SSD in the worst case, so there is redundancy in the error correction capability of the strongest LDPC error correction code, which will also affect the SSD. Excellent read and write performance, resulting in waste of energy consumption for error correction of SSDs

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