Solid disc self-adaptive error correction method and system

Abstract

The invention discloses a solid disc self-adaptive LDPC (Low-Density Parity-Check) error correction method which comprises the following steps: (1) initializing, namely, before data is input into a solid disc, performing block erase operation, and initializing error correction code identifiers of all erased blocks; (2) performing solid disc self-adaptive error correction encoding, namely, encoding written original data to generate codes; and (3) performing solid disc decoding, namely, (3.1) judging whether read operation is performed or not, if read operation is performed, turning to a step (3.2), otherwise, ending the operation; (3.2) judging whether an error correction code identifier Bi of a block i with reading pages is 0 or not; (3.3) if Bi is 0, correcting errors in all pages in the block i by using weak LDPC codes; (3.4) performing solid disc self-adaptive error correction code switching operation; and (3.5) if Bi is 1, correcting errors of all pages in the block i by using strong LDPC codes. The solid disc self-adaptive LDPC error correction method is applicable to the field of solid disc error correction, the error correction property of LDPC is improved and brought into sufficient play, and the reliability of stored data is improved.

Description

technical field [0001] The invention belongs to the technical field of solid-state disk error correction, and in particular relates to a solid-state disk self-adaptive error correction method and system. Background technique [0002] With the popularization of various electronic devices in daily life, solid-state disks are widely used as a storage device, and it is increasingly important to ensure the security of data in the solid-state disks. As an important measure to ensure data security, it is very important to maximize the efficiency of the error-correcting code. [0003] The manufacturing process of the flash memory chip inside the solid-state disk has been developed to the level of 10 nanometers, which means that the cell size inside the flash memory chip is getting smaller and smaller, and the noise is correspondingly increased, requiring more powerful error correction codes. A flash memory chip consists of multiple structural levels. The smallest read / write unit is...

AI Technical Summary

Problems solved by technology

Under normal circumstances, SSDs use the LDPC code with the strongest error correction capability to ensure the data security of the SSD in the worst case, so there is redundancy in the error correction capability of the strongest LDPC error correction code, which will also affect the SSD. Excellent read and write performance, resulting in waste of energy consumption for error correction of SSDs

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