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Server test system and interface configuration method

A test system and interface configuration technology, applied in transmission systems, digital transmission systems, electrical components, etc., can solve the problem that the server debugging interface cannot adapt to various system structures, etc.

Active Publication Date: 2015-12-09
INSPUR BEIJING ELECTRONICS INFORMATION IND
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] The invention provides a server testing system and an interface configuration method, which solves the problem that the existing server debugging interface cannot adapt to various system structures

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Embodiment Construction

[0019] In the existing server debugging interface design, generally 2-way or 4-way servers will use an ITP tool for debugging, but this has defects. If the server system uses two-way servers as the minimum node, when the system is configured with 4-way servers, or 8 It is not possible to use an ITP tool for flexible debugging when the server is connected to the road. In order to solve the above-mentioned problems, the embodiment of the present invention provides a flexible and configurable server test system and interface configuration method of multi-way servers, by designing different processor JTAG signal automatic switching switches in the minimum system of 2-way servers, using the system Sequence controller for automatic switching. Realize the debugging of multi-channel servers using an ITP tool.

[0020] The technical solution of the present invention will be described in more detail below with reference to the drawings and embodiments.

[0021] It should be noted that...

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Abstract

The invention provides a server test system and an interface configuration method, relates to the field of computer application and solves a problem that the existing server debugging interface cannot adapt to various system structures. The system comprises at least one first-level debugging subsystem, wherein each first-level debugging subsystem comprises at least one second-level debugging subsystem; and the second-level debugging subsystems are connected through a branch structure. The technical scheme provided by the invention is suitable for a server network, and adaptive matching of different configuration ways is achieved through a multilevel connection structure.

Description

technical field [0001] The invention relates to the field of computer applications, in particular to a server testing system and an interface configuration method. Background technique [0002] With the development of information technology, there are more and more server application scenarios, and the increasing business volume requires higher and higher performance and reliability of servers. Therefore, the server has to undergo a lot of rigorous testing during the development process. When a problem occurs in the test, the developer needs to analyze the problem. Processor failure is one of the high-frequency failures of the server. The current design uses Intel's special debugging tool ITP (IntelIntel -TargetProbe) tool for debugging, and the ITP tool communicates with the processor through the JTAG (JointTestActionGroup; joint test working group) debugging signal of the processor to read or control the internal registers of the processor to realize the analysis of the fa...

Claims

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Application Information

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IPC IPC(8): H04L12/24H04L12/26
CPCH04L41/08H04L43/50
Inventor 白秀杨叶丰华
Owner INSPUR BEIJING ELECTRONICS INFORMATION IND