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pin lock structure

A technology for locking structures and pins, which is applied to semiconductor/solid-state device components, semiconductor devices, electrical components, etc., and can solve problems such as integrated circuit failure

Active Publication Date: 2019-03-15
NXP BV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This type of thermal stress can lead to premature failure of integrated circuits over time
These questions may present challenges

Method used

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Embodiment Construction

[0019] The details of the present invention will be described in detail below through the description of the examples in the accompanying drawings, and various modifications and modifications are also applicable to the present invention. It should be understood, however, that the invention is not limited to the particular embodiments described. On the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the aspects of the invention including those defined in the claims. In addition, the "example" referred to throughout the application is for the purpose of illustration only and not for limitation.

[0020] It is believed that aspects of the present invention are applicable in many different types of devices and systems involving integrated circuit packaging. Aspects of the invention can be demonstrated by the various examples described above and below, the invention is not limited to the examples described.

[0021] Aspects of t...

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Abstract

Aspects are directed to apparatus, systems, and related methods related to the mitigation of problems related to thermal expansion and contraction of leads of integrated circuit packages. Consistent with one or more embodiments, the pins on the leadframe substrate each have a locking structure that locks the pins into a proper position relative to the substrate. The pins provide locations for connecting bond wires to the integrated circuit and connect the bond wires to terminals around the lead frame. The locking structure and the structure of the pins reduce problems such as cracking or disconnection of the solder connections of the bond wires to the lead frame, which may occur due to thermal expansion and contraction.

Description

technical field [0001] Aspects of the invention are directed to integrated circuit packages and their implementation, particularly to integrated circuit packages using leadframes that electrically connect the integrated circuit to a substrate and / or to another integrated circuit. Background technique [0002] Embodiments address issues related to heat and other stresses that can cause structural problems, such as connections between bond wires and leadframes. For example, various integrated circuit packages use a leadframe with pins connecting terminals near the periphery of the leadframe to an interior portion of the leadframe where an integrated circuit die may be connected by bond wires. In use, the leads of an integrated circuit package may experience thermal expansion and contraction, causing stress on connected components such as solder between the leads and bonding wires. Such thermal stress can lead to premature failure of integrated circuits over time. These issue...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/495H01L23/31
CPCH01L23/31H01L23/49517H01L23/49503H01L23/49861H01L2924/00014H01L24/16H01L24/48H01L24/49H01L2224/16245H01L2224/48247H01L2224/49171H01L2924/1432H01L23/562H01L23/49548H01L2224/45099H01L2224/45015H01L2924/207H01L2224/05599H01L24/46H01L2924/3512
Inventor 沙亚通·萨克朗威瓦·坦翁旺
Owner NXP BV