Substrate interconnection structure for packaging semiconductor device

Abstract

The invention provides a substrate interconnection structure for packaging semiconductor device, which is used for a "general" substrate of a semiconductor device, and is formed of non-conductive substrate materials. An even conductive column array is formed in the substrate material. The column extends from the upper surface of the substrate to the lower surface of the substrate. An installing disc of a pipe core can be formed at the upper surface of the substrate material. The column under the installing disc of the pipe core is connected to a column at the periphery of the installing disc of the pipe core. The power supply and the ground loop can be formed through columns which are connected to and surround the installing disc of the pipe core.

Description

technical field [0001] The present invention relates to integrated circuit (IC) packaging, and more particularly, to substrates for semiconductor packaging. Background technique [0002] Substrates comprising arrays of interconnect structures such as copper pillars and used for semiconductor packaging are known, for example in US Patent No. 9,437,492 to Freescale Semiconductor Corporation. During packaging of semiconductor devices, semiconductor die are mounted and attached to one set of posts and then electrically connected to other posts with solder wires. The die and wire bonds are then encapsulated with a plastic material to form a packaged device. Unfortunately, the post below the die or the post on which the die is mounted cannot be used because these posts are covered by the die. It would be advantageous to be able to utilize these columns. Contents of the invention [0003] In one embodiment, a substrate for a semiconductor device is provided, comprising a non-c...

AI Technical Summary

Problems solved by technology

Unfortunately, the post below the die or the post above which the die is mounted cannot be used as these posts are covered by the die

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