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Memory and programming operation method thereof, peripheral circuit and memory system

An operation method and memory technology, applied in memory and storage system, memory programming operation method, peripheral circuit field, can solve the problems of programming interference, limited electric field force, inability to effectively reduce channel charge density, etc., to improve storage characteristics , the effect of reducing the interference of the on-voltage

Pending Publication Date: 2022-04-15
YANGTZE MEMORY TECH CO LTD
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  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, with the increase in the number of stacked layers and the number of stacked layers in 3D NAND memory, the length of the channel is getting longer and the bonding area between the stacked layers is more and more, so that the electrons in the channel farther from the source terminal are affected. Due to the limited electric field force, it cannot migrate to the source terminal efficiently, which leads to the inability to effectively reduce the channel charge density in the pre-charging stage, and the programming interference is serious.

Method used

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  • Memory and programming operation method thereof, peripheral circuit and memory system
  • Memory and programming operation method thereof, peripheral circuit and memory system
  • Memory and programming operation method thereof, peripheral circuit and memory system

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Embodiment Construction

[0035] For a better understanding of the application, various aspects of the application will be described in more detail with reference to the accompanying drawings. It should be understood that these detailed descriptions are descriptions of exemplary embodiments of the application only, and are not intended to limit the scope of the application in any way.

[0036] It should be noted that in this specification, expressions such as first, second, third, etc. are only used to distinguish one feature from another, and do not represent any limitation on the features, especially do not represent any sequential order. Thus, a first voltage discussed in this application could also be termed a second voltage, and vice versa, without departing from the teachings of this application.

[0037] In the drawings, the thickness, size and shape of components have been slightly adjusted for convenience of illustration. The drawings are examples only and are not strictly drawn to scale. As...

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Abstract

The invention provides a memory, a programming operation method thereof, a peripheral circuit and a memory system. The memory sequentially comprises an array common source electrode, a bottom layer, a middle layer, a top layer and a bit line which are connected in series along a preset direction, and the programming operation method of the memory comprises the following steps: performing pre-charging of programming operation: providing a first voltage for the array common source electrode and the bit line; a second voltage is provided for a programmed state storage unit in the memory, so that a channel in the programmed state storage unit is conducted, and the programmed state storage unit is located at least one of the middle level and the top level; and performing programming operation on the middle to-be-programmed storage unit in the middle level.

Description

technical field [0001] The present application relates to the technical field of semiconductors, and more specifically, to a memory programming operation method, a peripheral circuit, a memory, and a storage system. Background technique [0002] With the application of 5G technology and the rapid growth of demand for Internet of Things applications, the market demand for memory storage capacity is increasing. 3D NAND Flash, as the current mainstream storage device, generally increases the storage capacity by increasing the number of storage layers. However, in the actual manufacturing process of the memory, due to the limitation of the deep hole etching process, the number of layers is generally increased by multiple etchings. For example, existing mainstream products have adopted a 2-layer stacking layer architecture, and the number of stacking layers may continue to increase in the future, such as adopting 3 or more stacking layers. [0003] At present, when programming ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/12G11C16/24
Inventor 李楷威贾建权王均保游开开张安
Owner YANGTZE MEMORY TECH CO LTD
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