Device, system and method for managing switching between power supply state

Abstract

An interface between an accelerated graphics port graphics controller (AGP-GC) and a core controller to prevent entry into a low power state from interfering with transfers to or from the AGP-GC that have been requested but not completed. The core controller can communicate to the AGP-GC an intent to enter a low power state, while the AGP-GC can communicate to the core controller the busy status of the AGP-GC. When the AGP-GC receives notice of an intent to enter a low power state, it can stop issuing requests to the core controller. When the core controller detects that the AGP-GC is busy, the core controller can postpone entry into the low power state until the AGP-GC completes any requests that are in progress. In an alternate use of the interface, if the AGP-GC wishes to make a request during a low power state, it can signal the core controller of this need by indicating a busy status, which can trigger the core controller to initiate an exit from the low power state.

Description

technical field [0001] The present invention generally relates to computer systems. Especially with regard to managing transitions between power states in computer systems. Background technique [0002] As computer designs increasingly rely on the bus to provide ever-increasing amounts of data transfer, many computers have incorporated a chipset, often referred to as a "core," or "core controller," as a central controller, Provides independent interfaces and control logic to the processor (CPU), system memory, and various other peripherals. In particular, the increased focus on graphics has led to a separate graphics controller connected to the core controller via a dedicated graphics bus. One form of graphics controller interface is called Accelerated Graphics Interface Graphics Controller (referred to herein as AGP-GC), while the bus connecting it is called the AGP-GC bus. Read and write requests from the AGP-GC are used to initiate multi-byte memory transfers between t...

AI Technical Summary

Problems solved by technology

If less time is required to actually complete the transfer, the remaining time will be wasted, which will affect the efficiency of the system and cause increased power usage due to unnecessarily delaying entry to sleep

However, if more time than allotted is required to complete the transfer, some data will be lost when the time period expires and when a low power state is entered before the data transfer is complete

To this end, the problems of lost data and errors are reduced, but not eliminated, by using a predetermined delay between the announcement of an intention to enter a low power state and the actual entry into a low power state

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