Semiconductor memory device and method of manufacturing the same
a memory device and semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device details, electrical devices, etc., can solve problems such as substrate warpag
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first embodiment
Semiconductor Memory Device
[0022]FIG. 1 is a block diagram of a nonvolatile semiconductor memory device according to a first embodiment. The nonvolatile semiconductor memory device of the first embodiment stores write data inputted from an external host 9, in a certain address in a memory cell array 1. In addition, the nonvolatile semiconductor memory device of the first embodiment reads data from a certain address in the memory cell array 1, and outputs the data to the external host 9.
[0023]That is, as shown in FIG. 1, the nonvolatile semiconductor memory device of the first embodiment comprises the memory cell array 1 that stores data. The memory cell array 1 comprises a plurality of memory blocks MB. As will be described later with reference to FIG. 2, these memory blocks MB each comprise: a plurality of memory cells MC; and a bit line BL and a word line WL connected to these memory cells MC.
[0024]As shown in FIG. 1, the nonvolatile semiconductor memory device of the first embodi...
second embodiment
[0074]Next, a configuration of a nonvolatile semiconductor memory device according to a second embodiment will be described with reference to FIG. 30. FIG. 30 is a plan view showing the configuration of the nonvolatile semiconductor memory device of the second embodiment. An overall configuration of the nonvolatile semiconductor memory device of this second embodiment is identical to that of the first embodiment (FIGS. 1 to 4), hence a duplicated description thereof will be omitted. However, as shown in FIG. 30, in this second embodiment, a shape of a through hole H1′ is different from that in the first embodiment. In FIG. 30, portions similar to those of the first embodiment are assigned with identical reference symbols to those assigned in the first embodiment, and descriptions thereof will be omitted. Note that in FIG. 30, illustration of the bit line BL and the source line SL is omitted.
[0075]As shown in FIG. 30, the nonvolatile semiconductor memory device according to the secon...
third embodiment
[0077]Next, a configuration of a nonvolatile semiconductor memory device according to a third embodiment will be described with reference to FIG. 31. FIG. 31 is a plan view showing the configuration of the nonvolatile semiconductor memory device of the third embodiment. An overall configuration of the nonvolatile semiconductor memory device of this third embodiment is identical to that of the first embodiment (FIGS. 1 to 4), hence a duplicated description thereof will be omitted. However, as shown in FIG. 31, in this third embodiment, a shape of a through hole H1c is different from that in the first embodiment. In FIG. 31, portions similar to those of the first embodiment are assigned with identical reference symbols to those assigned in the first embodiment, and descriptions thereof will be omitted. Note that in FIG. 31, illustration of the bit line BL and the source line SL is omitted.
[0078]As shown in FIG. 31, the nonvolatile semiconductor memory device according to the third emb...
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