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WCDMA code chip processing equipment

A processing device and chip technology, which is applied in the field of WCDMA mobile communication, can solve problems such as excessive occupation of hardware resources and complex control circuit design, and achieve the effects of saving hardware resources, flexible duplication, and no delay

Inactive Publication Date: 2010-05-19
ZTE CORP
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  • Abstract
  • Description
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AI Technical Summary

Problems solved by technology

[0009] The technical problem to be solved by the present invention is to provide a WCDMA chip-level processing device, which is used to solve the problems of complex control circuit design and excessive hardware resource occupation caused by the use of cache technology for chip-level processing in the prior art

Method used

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  • WCDMA code chip processing equipment
  • WCDMA code chip processing equipment
  • WCDMA code chip processing equipment

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Embodiment Construction

[0039] see figure 1 , is the WCDMA chip-level processing device of the present invention. This figure shows the external interface signals and internal components of the whole processing device. The whole chip-level processing device has three kinds of external interfaces, namely bus interface, sampling data interface and chip-level Output interface; the entire chip-level processing device 100 includes four main modules, namely: a register module 11 , a clock management module 12 , a frame processing module 13 and a descrambling, despreading and integrating module 14 .

[0040] figure 1 In , the connection relationship between the input and output signals of the interface device is as follows:

[0041] The upper left signal of the interface device is mainly connected with the DSP digital signal processor. The main signals include: bus clock signal DSP_CLK, bus chip select signal DSP_CS, bus address line DSP_ADDR, bus write control signal DSP_WR, bus read control signal DSP_RD...

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Abstract

This invention discloses a device of WCDMA chip-level process device including a bus interface module, a sample data interface module, a chip-level output interface module, a register module connectedto said bus interface module and used in maintaining the match information necessary for normal work of the device, a clock management module connected to the bus interface module and the sample datainterface module for controlling and managing the clock of the device, a framing process module for framing based on the path time sequence information in the match information and the generated counting value to get frame head signals and a descramble and integral module used in descrambling, de-expanding and integral process to get and output symbol stage IQ data.

Description

technical field [0001] The invention relates to the field of WCDMA (Wide Code Division Multiple Access, wideband code division multiple access) mobile communication, in particular to a chip-level processing device for WCDMA downlink reception. Background technique [0002] At present, there are three mainstream solutions in the field of third-generation mobile communication, including WCDMA technology, CDMA (Code Division Multiple Access, Code Division Multiple Access) technology and TD-SCDMA (Time Division-Synchronized Code Division Multiple Access, time-division synchronization Code Division Multiple Access) technology, these three technologies are based on the principle of spread spectrum communication, because WCDMA evolved from GSM (Global System for Mobile Communication, Global System for Mobile Communication), it has a wider use base, WCDMA can provide Voice, variable-rate data, and multimedia services can adapt to various environments and realize global roaming, larg...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04B1/707H04J13/02H04B7/216H04B1/711
CPCY02D30/70
Inventor 蔺化军
Owner ZTE CORP
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