Bias matcher matched with quadrature modulator

A technology of bias matcher and quadrature modulator, which is applied in the field of bias matcher, can solve the problems such as difficulty in guaranteeing errors such as resistance, difficulty in meeting performance consistency requirements, and reduction of voltage difference local oscillation suppression. Achieve the effects of simple circuit structure and production process, improve anti-interference ability, and suppress spectrum distortion

Inactive Publication Date: 2011-07-13
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in production practice, the error of the marked parameter value and the actual (measured) parameter value of the components such as resistors and capacitors provided in production practice is generally within ±5-10%, even if the best resistors and capacitors are selected and welded, When the debugging is very good, it is difficult to ensure that the resistance error between each pair of ports is within the range of ±5%, and the suppression degree of the local oscillator can only reach about 15db, which is far from being able to exert quadrature modulation. The local vibration suppression degree of the device should be ≥ 30db ideal performance
Among them, due to the many resistive elements involved in the DC bias circuit, the consistency of performance is more difficult to meet the requirements; image 3 Among them, R3 and R2 constitute a voltage divider circuit, and R2 also acts as a bias resistor, which not only needs to coordinate the DC bias voltage of each differential signal input port; but also ensures that the four differential signal input ports The DC bias voltages between them are highly consistent, so it is extremely difficult to debug, and the I and Q two-way mixers are extremely sensitive to the voltage difference between the bias voltages input by the four bias matching circuits (each phase difference is 1mV, The local oscillation suppression degree is reduced by 1-2db, and the corresponding resistance values ​​in each group of resistances differ by 1%, and the bias voltages will differ by about 12mV)
Therefore, this type of bias matcher has poor consistency in the performance of each bias matching circuit, poor manufacturability in the production process, difficult debugging, and poor matching with the quadrature modulator during use, which greatly limits the performance of the quadrature modulator performance and reduce the anti-interference ability of the signal and other defects; if the resistance and capacitance used in each set of bias matchers are assembled with actual measurement and matching, although the matching can be improved to a certain extent and to a certain extent Promote the performance of the quadrature modulator, but there are disadvantages such as difficulty in industrial production and a significant increase in production costs

Method used

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  • Bias matcher matched with quadrature modulator
  • Bias matcher matched with quadrature modulator
  • Bias matcher matched with quadrature modulator

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Embodiment Construction

[0011] The model of the quadrature modulator in this embodiment is AD8349, wherein IBBP and IBBN are the differential signal input terminals of the mixer ①, QBBP and QBBN are the differential signal input terminals of the mixer ②, and each input terminal is high impedance; The straight capacitor C1 is 0.47μ capacitor, the grounding capacitor C2 is 0.40μ, each AC matching resistor R1 is 50Ω, the grounding resistor R2 in the voltage divider circuit is 2.2KΩ, R3 is 10KΩ, the DC input voltage Vcc is +5V, and the AC The input voltage of the voltage input terminal is 700mV double-peak AC, and the phase difference between V1+ and V1-, V2+ and V2- is 180°.

[0012] In the case of DC voltage in this embodiment, the capacitors C1 and C2 can be regarded as open circuits, so the DC voltage Vcc.R2 / (R2+R3)=4.09V generated by the voltage divider circuit 3 passes through 4 AC matching resistors respectively R1, the DC bias voltage output by the two pairs of output ports A1, A2 and B1, B2 is 4...

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Abstract

The invention belongs to a bias matcher matched with a quadrature modulator, which comprises a blocking circuit, an alternating current (AC) matching interface circuit, a direct current (DC) bias circuit, two pairs of differential AC voltage input ports and two pairs of corresponding output ports. As a voltage division circuit shared by DC bias unit circuits is arranged between a DC power supply and a grounding end, and all blocking capacitors are re-arranged at the input ends of AC power supplies of the corresponding bias matching circuits, a grounding resistor in the voltage division circuit no longer has the function of a biasing resistor, while a corresponding AC matching resistor has the function of the biasing resistor respectively. Therefore, the bias matcher matched with the quadrature modulator is characterized in that: the circuit structure and the production process are simple, the requirement on performance consistency of the elements such as the resistor, the capacitor and the like is low, the consistency of performance parameters between the bias matching unit circuits and the matching between the quadrature modulators are high, the anti-interference capability of a signal is effectively improved, the spectrum distortion of the signal is inhibited; and the bias matcher can be industrially produced on a large scale, the production efficiency is high and the cost is low.

Description

technical field [0001] The invention belongs to a bias matcher in a communication device, in particular to a bias matcher used with a quadrature modulator, the matcher is connected to the differential input terminals of the I and Q two-way mixers The connection ensures the balance of the four inputs and effectively suppresses the spectral distortion of the signal. Background technique [0002] In the quadrature modulator, the I and Q two-way mixers have four differential signal input ports (IBBP, IBBN, QBBP and QBBN ports), and each port needs to pass through a DC bias circuit and an AC matching interface circuit. The included bias matching circuit provides DC bias voltage and realizes the maximum input power. Each circuit in a traditional bias matcher includes an AC matching interface unit circuit composed of a grounding resistor and an AC input wire, a grounding resistor (grounding circuit) and a (connected) DC power resistor (power supply circuit) and its A DC bias unit...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03H7/38
Inventor 何韬刘晓晖邹显邴刘亚姣
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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