Flash write circuit with source line voltage compensation

Abstract

A flash memory writing circuit with source line voltage compensation, comprising: a charge pump; a voltage stabilizing module; a source line voltage mode compensation module; a first switch; a first source line driving module; a word line selection module; a bit line selection module; Programming current generation module; source line voltage monitoring module; second source line drive module, second switch and current mirror circuit, the second source line drive module is the same as the first source line drive module, and the second switch is the same as the The same as the first switch, the first terminal of the current mirror circuit is connected to the bit line current terminal of the programming current generating module, and the second terminal of the current mirror circuit is connected to the output terminal of the second source line driving module. The writing circuit of the present invention can avoid the problem that the voltage monitored by the source line monitoring module reaches the minimum writing voltage of the flash memory storage unit, but the voltage of the flash memory storage unit in the actual circuit is lower than the minimum writing voltage, which causes the problem that the storage unit is not written correctly .

Description

technical field [0001] The invention relates to a flash memory writing circuit, in particular to a flash memory writing circuit with source line voltage compensation. Background technique [0002] Flash memory (Flash), because it is lightweight and can still save data in the case of power failure, is widely used in portable electronic devices, such as mobile phones, digital cameras, MP3 players, and so on. At present, the memory cell commonly used in flash memory is a split gate memory cell, and its cross section is as follows: figure 1 As shown, the drain electrode 11 and the source electrode 12 are separated by the channel region 13 on the substrate 10, and above the source electrode 12 and the channel region 13, an insulating material, such as a silicon dioxide layer 14, is provided. The gate connected to any part is called the “floating gate” 15 , and another gate is set above the floating gate 15 and the channel region 13 , which is led out by wires and is called the “...

AI Technical Summary

Problems solved by technology

[0007] However, since the first switch 33 and the first source line driver module 34 of the flash memory peripheral circuit are usually implemented by MOS transistors, there is a voltage drop. In this way, when the source line voltage monitoring module 38 detects that the voltage at the input terminal of the first switch is the lowest allowable voltage, the transmission The voltage to the flash memory cell may drop below Vpp, which is lower than the minimum write voltage Vpp required by the flash memory cell, causing the memory cell to not be written correctly

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