On-line traffic bottleneck predictive control method based on field programmable gate array (FPGA) and improved dispersed macroscopic D model

A technology of predictive control and macro traffic flow, applied in the field of FPGA control

Active Publication Date: 2013-02-20
XIAN FEISIDA AUTOMATION ENG
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Problems solved by technology

[0007] In order to overcome the technical defect that the existing methods are difficult to carry out online prediction and control of traffic bottlenecks in actual expressways or closed roads, the present invention provides an online traffic bottleneck control method based on FPGA and improved discrete macro-D model. The macro D model is improved, and the variable information display board is integrated into the discrete macro D model. Based on the FPGA platform, the improved discrete macro D model is used to predict and analyze the expressway or closed road as a whole, and find the road bottleneck according to the defined state variables. Furthermore, the control schemes for turn control and variable information display boards are given, and these control schemes are brought into the prediction model according to the priority to find a reasonable control scheme, so as to carry out online control of traffic bottlenecks, which can effectively solve the problem that existing schemes are difficult to solve. Technical Issues of On-Line Prediction and Regulation of Traffic Bottlenecks in Actual Expressways or Closed Roads

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  • On-line traffic bottleneck predictive control method based on field programmable gate array (FPGA) and improved dispersed macroscopic D model
  • On-line traffic bottleneck predictive control method based on field programmable gate array (FPGA) and improved dispersed macroscopic D model
  • On-line traffic bottleneck predictive control method based on field programmable gate array (FPGA) and improved dispersed macroscopic D model

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Embodiment Construction

[0046] Refer to attached figure 1 , 2 Describe the present invention in detail.

[0047] The flow chart of the control method of the present invention is attached figure 2 As shown, in the case of no traffic bottleneck, the control scheme is that the variable display board displays the allowable free flow speed of the road, and the turn control does not limit the input and output. The speed and turn control scheme predicts the traffic flow density and the average vehicle speed of each road section for a period of time T c (T c take T 0 , T 1 If there is no traffic bottleneck, use the current control scheme for regulation. If there is a bottleneck, adjust the display speed of the variable display board and the turn control scheme according to the aforementioned priority principle. and continue to predict for some time T c , if the traffic bottleneck cannot be removed, continue to adjust the control scheme until a control scheme is found that can solve the traffic bottlen...

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Abstract

The invention discloses an on-line traffic bottleneck predictive control method based on a field programmable gate array (FPGA) and an improved dispersed macroscopic D model. The method is used for solving the technical problem that by means of existing methods, on-line predictive control of traffic bottlenecks in actual highways or closed roads is difficult to achieve. The method improves a dispersed macroscopic D model and integrates a variable information display board into the dispersed macroscopic D model, the highways or the closed roads are wholly subjected to predictive analyzing through the improved dispersed macroscopic D model on the basis of an FPGA platform, the traffic bottlenecks are found according to defined state variables, control schemes of a turn port and the variable information display board are given, and the control schemes are brought to a prediction model according to priority to find a reasonable control scheme so that on-line control of the traffic bottlenecks is achieved, and the traffic bottlenecks on the highways or the closed roads can be effectively controlled.

Description

technical field [0001] The invention relates to an FPGA control method, in particular to an online traffic bottleneck prediction control method based on the FPGA and an improved discrete macro D macro traffic flow model. Background technique [0002] Traffic congestion has become the focus of common attention of all countries in the world and an important problem that needs to be solved urgently. The traffic bottleneck problem is one of the most important problems restricting traffic flow. Due to the limitation of hardware facilities or the impact of emergencies, some sections of the road become If the bottleneck is not regulated, it will accelerate the accumulation of traffic in the bottleneck section, worsen the traffic condition, cause congestion, and even lead to the paralysis of the entire transportation network. [0003] At present, there are only two ways of expressway traffic regulation: variable information display boards for speed limit and turn control. In order t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G08G1/08G06Q10/04G06Q50/30
Inventor 史忠科刘通
Owner XIAN FEISIDA AUTOMATION ENG
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