Data layout method and device thereof

Abstract

The invention provides a method and a device for structuring the data. The method comprises that a first data block which is processed through a first code is partitioned into a plurality of second data blocks, wherein each second data block corresponds to a processor core; the first code determines the corresponding boundary data of each second data block; local memory spaces are applied for each second data block and the corresponding boundary data in the corresponding processor core; and a second code which corresponds to each second data block is generated according to the first code, and the second codes can process the second data blocks in the corresponding processor cores of the second data blocks according to the processing logic of the first code. By the method, the access and memory expenditures can be reduced, and accordingly, the program execution speed of a processor is increased.

Description

technical field [0001] The invention relates to heterogeneous many-core processor technology, in particular to a data layout method and device. Background technique [0002] A heterogeneous many-core processor includes a main processor core (master core) and multiple slave processor cores (slave cores), and improves efficiency and performance by integrating different types of cores. Generally speaking, the master core is responsible for resource management and scheduling, and the slave core is responsible for accelerating applications. Each slave core usually has an on-chip local storage with limited capacity to store and process required data. [0003] In a heterogeneous many-core processor, after certain regular application programs are mapped to multiple slave cores, during the execution of the program, boundary communication among multiple slave cores is required to obtain boundary data. At present, most heterogeneous many-core compilers map programs to heterogeneous ma...

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Problems solved by technology

For example, in problems such as stencil computation, the value of each point in the multi-dimensional grid needs to be updated repeatedly, and when updating an element, adjacent elements are required for auxiliary processing, and the slave core needs to be processed during processing. Boundary communication is used to obtain adjacent elements at the boundary. If the shared storage model is adopted, mapping template processing to heterogeneous cores will generate a large number of memory accesses, resulting in a decrease in program performance.

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