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Non-volatile storage element and non-volatile storage device

A non-volatile storage and memory unit technology, applied in the direction of electrical components, information storage, static memory, etc., can solve the problems of increased resistance change layer deviation and resistance change characteristic deviation, and achieve the deviation of resistance change characteristic small effect

Active Publication Date: 2013-10-09
PANASONIC SEMICON SOLUTIONS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The variable resistance element having such filaments has the problem that the variation in the resistance value of the variable resistance layer during the resistance variation increases, and the variation in the resistance variation characteristic increases.

Method used

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  • Non-volatile storage element and non-volatile storage device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment approach 1

[0069] [Structure of non-volatile storage element]

[0070] figure 1 It is a cross-sectional view showing a configuration example of the nonvolatile memory element according to Embodiment 1 of the present invention.

[0071] The nonvolatile memory element 100 of this embodiment includes a substrate 101, an interlayer insulating film 102 formed on the substrate 101, a first electrode 103, a second electrode 106, and a substrate formed on the interlayer insulating film 102. The variable resistance layer 104 sandwiched between the first electrode 103 and the second electrode 106.

[0072] The resistance variable layer 104 is composed of a metal oxide (metal oxide) sandwiched between the first electrode 103 and the second electrode 106, and the resistance value can be determined according to the voltage applied between the first electrode 103 and the second electrode 106. The signal comes to reversibly change the layer. For example, in accordance with the polarity of the voltage pulse...

Embodiment approach 2

[0226] Figure 16 It is a cross-sectional view showing a configuration example of a variable resistance nonvolatile memory element 400 according to Embodiment 2 of the present invention.

[0227] figure 1 The variable resistance nonvolatile memory element 100 and the Figure 16 The difference of the nonvolatile memory element 400 is that the layers of the variable resistance layer are arranged upside down, and the first electrode and the second electrode are arranged upside down. That is, in the nonvolatile memory element 100, the second electrode 106 is arranged above the first electrode 103, and in the nonvolatile memory element 400, the second electrode 406 is arranged below the first electrode 403.

[0228] The nonvolatile memory element 400 of this embodiment includes a substrate 401, an interlayer insulating film 402 formed on the substrate 401, a second electrode 406 formed on the interlayer insulating film 402, a first electrode 403, and a substrate 401. The resistance var...

Embodiment approach 3

[0242] Figure 18 It is a cross-sectional view showing a configuration example of a variable resistance nonvolatile memory element 500 according to Embodiment 3 of the present invention.

[0243] figure 1 The variable resistance nonvolatile memory element 100 and the Figure 18 The difference of the nonvolatile memory element 500 is that the partial area 105 is composed of a first partial area 105a and a second partial area 105b.

[0244] The nonvolatile memory element 500 includes a substrate 101, an interlayer insulating film 102, a first electrode 103, a second electrode 106, and a resistance variable layer 104.

[0245] Here, the variable resistance layer 104 includes a first oxide layer 104 a, a second oxide layer 104 b, a third oxide layer 104 c, and a local area 105. The resistivity ρ of the first oxide layer 104a x , The resistivity ρ of the second oxide layer 104b y , And the resistivity ρ of the third oxide layer 104c z The relationship is ρ x y z .

[0246] In addition, ...

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Abstract

This non-volatile storage element is equipped with: a first electrode (103); a second electrode (106); and a variable resistance layer (104) that comprises metal oxides and is formed between the first electrode (103) and the second electrode (106). The variable resistance layer (104) includes: a first oxide layer (104a) that is provided on the first electrode (103) and has a resistivity of [rho] x; a second oxide layer (104b) that is provided on the first oxide layer (104a) and has a resistivity of [rho]y (where [rho]x<[rho]y); a third oxide layer (104c) that is provided on the second oxide layer (104b) and has a resistivity of [rho]z (where [rho]y<[rho]z); and a local region (105) that is provided inside the third oxide layer and the second oxide layer (104b) so as to come into contact with the second electrode (106) without coming into contact with the first oxide layer (104a), and has a resistivity that is lower than that of the third oxide layer (104c) and is different from the resistivity of the second oxide layer (104b).

Description

Technical field [0001] The present invention relates to a nonvolatile memory element, and more particularly, to a resistance change type nonvolatile memory element whose resistance value changes reversibly in accordance with an applied electrical signal, and a nonvolatile memory device having the nonvolatile memory element. Background technique [0002] In recent years, with the development of digital technology in electronic devices, in order to store data such as music, images, and information, the requirements for large-capacity and non-volatile memory devices have increased. As a method to cope with this requirement, the resistance value changes in accordance with the supplied electrical signal, and the non-volatile storage element that continuously maintains its state is used in the non-volatile memory device of the memory cell (hereinafter, referred to as ReRAM )Having attention. This is because the structure of the nonvolatile memory element is relatively simple, and it i...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/105H01L45/00H01L49/00
CPCH01L45/146H01L45/145H01L27/2463G11C13/0007H01L45/1233G11C13/0002H01L27/2436H01L45/08H10B63/20H10B63/30H10B63/80H10N70/24H10N70/826H10N70/8833H10N70/883
Inventor 魏志强二宫健生高木刚
Owner PANASONIC SEMICON SOLUTIONS CO LTD