Semiconductor device and method of forming the same

A semiconductor and device technology, applied in the field of semiconductor devices and formation, can solve problems such as degradation and threshold voltage drift

Active Publication Date: 2017-06-16
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, since there is no shallow trench isolation structure formed between adjacent MOS transistors, there may be leakage current between the channel regions of different MOS transistors, causing problems such as crosstalk, noise margin degradation, and threshold voltage drift.

Method used

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  • Semiconductor device and method of forming the same
  • Semiconductor device and method of forming the same
  • Semiconductor device and method of forming the same

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Embodiment Construction

[0026] As described in the background technology, figure 1 In the semiconductor device shown, since the shallow trench isolation structure is not formed between adjacent MOS transistors, there may be leakage current between the channel regions of different MOS transistors, causing problems such as crosstalk, noise margin degradation, and threshold voltage drift. , for this reason, the present invention provides a kind of semiconductor device and its forming method, and the forming method of described semiconductor device comprises: form trench in the semiconductor substrate between adjacent gate structure, utilize selective epitaxial process to form trench in trench An epitaxial layer with protruding morphology is formed on the bottom surface; an insulating layer is formed in the epitaxial layer; a stress layer is formed in the groove, and the stress layer is used as a source and drain region. Since trenches are formed in the semiconductor substrate between adjacent gate struc...

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Abstract

A semiconductor device and its forming method. The forming method of the semiconductor device includes: forming a trench in a semiconductor substrate between adjacent gate structures, and forming a protruding topography on the bottom surface of the trench by using a selective epitaxial process. an epitaxial layer; processing the epitaxial layer to form an insulating layer; forming a stress layer in the groove, and the stress layer serves as a source and drain region. The insulating layer can reduce the leakage current between the channel regions of two adjacent MOS transistors, and because the epitaxial layer has a protruding shape, the thickness of the stress layer corresponding to the middle position of the trench is small, and the position of the side wall of the trench corresponds to The thickness of the stress layer is relatively large, which is beneficial to reduce the leakage current between the channel regions of two adjacent MOS transistors, and will not affect the stress effect of the stress layer on the channel regions of the MOS transistors.

Description

technical field [0001] The invention relates to semiconductor manufacturing technology, in particular to a semiconductor device and a forming method. Background technique [0002] In the field of semiconductor manufacturing, with the development of integration and miniaturization of semiconductor devices, in order to further improve chip utilization and increase chip integration, in some semiconductor devices, several MOS transistors are arranged side by side and reduced by sharing source and drain regions. occupied chip area. [0003] Please refer to figure 1 , is a schematic cross-sectional structure diagram of a semiconductor device in which multiple MOS transistors share a source region and a drain region in the prior art, including: a semiconductor substrate 10, a plurality of gate structures 11 arranged in parallel on the surface of the semiconductor substrate 10, located on the The trenches (not shown) in the semiconductor substrate 10 on both sides of the gate stru...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/146H01L21/8238
Inventor 洪中山
Owner SEMICON MFG INT (SHANGHAI) CORP
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