Arbiter-based completely-new-architecture circuit structure of physical unclonable function (PUF)
A technology of circuit structure and arbitrator, which is applied in the design of physical unclonable functions and the field of circuit structure of physical unclonable functions, which can solve the problem of different delay path lengths of jump signals, non-dynamic changes, and different transmission delays, etc. question
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[0011] The present invention will be further described in detail below in conjunction with the embodiments and the accompanying drawings, but the embodiments of the present invention are not limited thereto.
[0012] The PUF circuit involved in the present invention is composed of n MUX Groups, n arbitrators and 2n-2 MUXs. The internal structure of MUXGroup is as follows image 3 As shown, it is mainly composed of multiple nodes, and each node is composed of two 2-to-1 data selectors (MUX). The two MUXes in a node must be placed strictly symmetrically, and the connection to the MUX of the next node must also be symmetrical. The two MUXes in each node share a selection control signal. When the control signal is 0, the outputs of the two MUXes of the previous node will be transmitted in parallel to the outputs of the two MUXs of the current node; when the control signal is 1 , the outputs of the two MUXes of the previous node will be cross-transmitted to the outputs of the two...
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