Transistor and manufacturing method thereof
A manufacturing method and transistor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as unstable device amplification factors, and achieve the effect of stabilizing current amplification factors
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment 1
[0016] see figure 1 and figure 2 , a manufacturing method of a transistor, comprising:
[0017] Step S01: providing a substrate 1 of a first conductivity type;
[0018] Step S02: growing an epitaxial layer 2 with a second conductivity type on the first surface of the substrate 1, the epitaxial layer 2 includes a first layer 21, a second layer formed sequentially upward on the first surface of the substrate 1 The second floor 22 and the third floor 23;
[0019] Step S03: forming a base region 3 of the first conductivity type on the epitaxial layer 2, the base region 3 penetrates the epitaxial layer 2 and is connected to the substrate 1 at one end, so that the epitaxial layer 2 forms an emission region 4 The emitter region 4 includes an emitter layer 42 formed in the region of the second layer 22, a first isolation layer 41 formed in the region of the first layer 21, and a first isolation layer 41 formed in the region of the third layer 23 The second isolation layer 43;
...
Embodiment 2
[0035] see figure 2 , a transistor manufactured based on the manufacturing method in Embodiment 1, comprising: a substrate 1 of a first conductivity type; an epitaxial layer 2 of a second conductivity type grown on the first surface of the substrate 1; a first A conductivity type base region 3 runs through the epitaxial layer 2 and is connected to the substrate 1 at one end; an emitter region 4 is formed in the epitaxial layer region on one side of the base region, and the emitter region 4 is included in the A first isolation layer 41, an emitter layer 42, and a second isolation layer 43 are sequentially formed upward on the first surface of the substrate 1; and a collector region 5 is formed in the region of the epitaxial layer 2 on the other side of the base region 3 .
[0036] It can be understood that by adopting a three-layer epitaxial structure, the contact interface between the emitter layer 42 and the base region 3 does not need to go through processes such as high-t...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 


