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Apparatus and method for permutation sequencer

A technology of sequencers and registers, applied in the field of sequencers, can solve problems such as the difficulty of changing the power-on sequence

Pending Publication Date: 2020-05-01
QUALCOMM INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Hardcoding (e.g. in Programmable Logic Devices PLDs) means that changing the power-up sequence can be difficult as the architecture changes over time

Method used

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  • Apparatus and method for permutation sequencer
  • Apparatus and method for permutation sequencer
  • Apparatus and method for permutation sequencer

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Embodiment Construction

[0025] The detailed description set forth below in connection with the accompanying drawings is intended as a description of various configurations and is not intended to represent the only configurations in which the concepts described herein may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of various concepts. It will be apparent, however, to one skilled in the art that these concepts may be practiced without these specific details. In some instances, well-known structures and components are shown in block diagram form in order to avoid obscuring such concepts.

[0026] In a system architecture that includes multiple units, there may be two general classes of units. The first unit class may be a server unit and the second unit class may be a client unit. For example, hierarchies within a system architecture can be established where server units provide services or tasks to client units. One type of ...

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Abstract

Aspects of the disclosure are directed to sequencing. In accordance with one aspect, sequencing includes creating a one hot list (220); selecting a current word of the one hot list as a one hot list output (231); comparing the one hot list output with a current accumulation register value of an accumulation register (240) to produce a logical comparison; inputting the logical comparison to the accumulation register (240) to generate an updated accumulation register value; and outputting the updated accumulated register state to a client unit (280) to enable or disable the client unit.

Description

[0001] Cross References to Related Applications [0002] This patent application claims U.S. Provisional Application No. 15 / 707,689, filed September 18, 2017, and assigned to the present assignee, entitled "APPARATUSAND METHOD FOR A PERMUTATION SEQUENCER" and expressly incorporated herein by reference priority, as fully set forth below and for all applicable purposes. technical field [0003] This disclosure relates generally to the field of sequencers, and in particular to permutation sequencers. Background technique [0004] A sequencer is a controller used to sequentially enable or disable multiple client units. That is, each client unit is powered on one at a time in a specific order. For example, the client units may be power supplies in a system in which each power supply is turned on in a power-up sequence in a particular order (ie, permutation) that the client units are enabled. Typically, the power down sequence is the inverse of the power up sequence. The powe...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K19/00H03K19/17724G06F1/26
CPCG06F1/26H03K19/0016H03K19/17728H03K19/17752
Inventor K·W·哈根
Owner QUALCOMM INC