Voltage stabilizer

Abstract

The invention discloses a voltage stabilizer, and belongs to the field of electronics. The voltage stabilizer comprises a biasing circuit, a voltage stabilizing circuit and an output circuit. The voltage stabilizer can start to work and realize a voltage stabilizing function when the power supply voltage exceeds a preset stable voltage of a chip. When an internal main power supply works normally,the voltage stabilizer can assist the main power supply to output a current, and when the on-chip main power supply is abnormal, the voltage stabilizer provides a stable voltage to enable data in thechip not to be lost. The voltage stabilizer can provide a continuous and stable voltage for some circuits under the condition that the main power supply in the chip is not turned on, and the situationin which the data in the chip is lost when the internal main power supply is powered off abnormally or before starting of the internal main power supply is avoided.

Description

technical field [0001] The invention relates to the field of electronics, in particular to a submicroamp level voltage stabilizer. Background technique [0002] At present, most power management chips usually use a low dropout regulator (LDO) for voltage regulation. Traditional low dropout regulators such as figure 1 As shown, generally the output terminal VOUT is fed back to the input terminal of the amplifier through the voltage divider resistor to complete the closed-loop control. This kind of LDO usually consumes relatively large power consumption (for example: more than 5uA). However, in some application scenarios that require low power consumption (for example: electronic equipment is in standby state), although the LDO does not need to continue to work, in order to prevent some modules from losing data due to power failure, an ultra-low power regulator is still required. The module continuously supplies power to it. Existing low-dropout linear regulators cannot meet...

AI Technical Summary

Problems solved by technology

[0002] At present, most power management chips usually use a low dropout regulator (LDO) for voltage regulation. Traditional low dropout regulators such as figure 1 As shown, generally the output terminal VOUT is fed back to the input terminal of the amplifier through the voltage divider resistor to complete the closed-loop control. This kind of LDO usually consumes relatively large power consumption (for example: more than 5uA)

However, in some application scenarios that require low power consumption (for example: electronic equipment is in standby state), although the LDO does not need to continue to work, in order to prevent some modules from losing data due to power failure, an ultra-low power regulator is still required. The module provides continuous power for

Existing low-dropout linear regulators cannot meet the needs of the above scenarios

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