A testing method and device for a prototype verification system

A prototype verification and testing device technology, applied in the direction of error detection/correction, detection of faulty computer hardware, instruments, etc. Probability of errors and the effect of saving labor costs

Active Publication Date: 2021-06-04
S2C
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] In the process of realizing the solution of this application, the inventor found that when the prototype verification system needs to be tested, the practice in the prior art is usually that the tester manually confirms the type of product to be tested and the test items, and then controls it through the user in the host computer. The interface downloads different test logics and different test steps, loads, sets, and runs one by one, and reads back the final test results through different interfaces. This test operation method requires manual intervention and takes a long time. Consumes a lot of manpower and time, and the efficiency is low

Method used

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  • A testing method and device for a prototype verification system
  • A testing method and device for a prototype verification system
  • A testing method and device for a prototype verification system

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Embodiment Construction

[0061] The technical solutions in the embodiments of the present application will be described in detail below with reference to the drawings in the embodiments of the present application. When referring to the drawings, unless otherwise stated, the same numerals in different drawings identify the same or similar elements. Apparently, the embodiments described below are only some of the embodiments of the application, but not all of the embodiments, or the implementations described in the following exemplary embodiments do not represent all implementations consistent with the application. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

[0062] When the terms "first", "second", and "third" appear in the specification, claims, and above-mentioned drawings of the embodiments of the present application, they are used to distin...

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Abstract

The application provides a test method and device for a prototype verification system, including a test module and an interaction module; the interaction module is connected to the test module, and is used to send test instructions and display feedback information to the test module through interaction with users; the test module Connected with the prototype verification system to be tested, it is used to test the prototype verification system to be tested according to the test information and send the feedback information to the interactive module, wherein the test information is a linked list structure, and each linked list stores the test content and the address information of the next linked list . This application uses a linked list to store test information, which is convenient for maintenance and updating, can automatically complete test tasks more conveniently and efficiently, saves labor costs during testing, shortens test time, and improves test efficiency. In addition, through the screening and matching of test information, the test device can be compatible with different prototype verification systems to be tested, so that multiple different products can be tested at the same time, and the test efficiency is further improved.

Description

technical field [0001] The present application relates to the technical field of FPGA prototype verification system, in particular to a testing method and device for a prototype verification system. Background technique [0002] The prototype verification system for FPGA (Field Programmable Gate Array, Field Programmable Gate Array) is an indispensable software and hardware tool for IC design companies in the chip verification stage. Before a prototype verification system is delivered to the user for chip verification, it needs to pass a number of tests to ensure the reliability, stability and performance indicators of the prototype verification system, including conventional interface continuity tests, interface performance tests, System stress testing, etc. [0003] In the process of realizing the solution of this application, the inventor found that when the prototype verification system needs to be tested, the practice in the prior art is usually that the tester manuall...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/22
CPCG06F11/2247
Inventor 施敏捷吴滔
Owner S2C
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