Method for adding random number in circuit-level verification of memristor array module

A technology of an array module and a verification method, applied in the field of adding random numbers, can solve problems such as waste of human and material resources, and achieve the effects of reducing verification time, realizing functional verification, and saving labor and material costs.

Active Publication Date: 2021-08-13
TSINGHUA UNIV
View PDF2 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, circuit-level verification is very important to the successful tape-out of the chip. Otherwise, once there is a loophole in the functional verification, it needs to be repeated, which may cause a lot of waste of manpower and material resources.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for adding random number in circuit-level verification of memristor array module
  • Method for adding random number in circuit-level verification of memristor array module
  • Method for adding random number in circuit-level verification of memristor array module

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0017] The method for adding random numbers in the circuit-level verification of the memristor array module proposed by the present invention, its flow chart is as follows figure 1 shown, including the following steps:

[0018] (1) The verifier sets a register transfer-level model or a behavior-level model of the memristor array module, which includes the definition of the input port of the control signal, the definition of the output port, and the definition of the input port and the output port of the data signal; especially There is a clear definition of the output of each channel, that is, each output can be Xbit according to the requirements of the actual circuit.

[0019] (2) add a random number to the data signal output port in the above-mentioned model, as the last output of this model, the expression form of this random number is the code written in SystemVerilog language or Verilog language;

[0020] (3) according to the compiled statement in SystemVerilog language ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention belongs to the technical field of integrated circuits, and particularly relates to a method for adding random numbers in circuit-level verification of a memristor array module. Firstly, a verifier sets a register transfer level model or a behavior level model of a memristor array module, a random number is added to a data signal output port in the model to serve as the final output of the model, a statement is compiled according to a SystemVerilog language or a condition in the Verilog language, the random number is packaged, a packaging module is obtained, a macro name of the package module is added to a profile for circuit-level verification of the memristor array module. From the perspective of circuit-level verification work, the method provided by the invention enables the verification work to estimate a certain random deviation of an actual circuit in advance in a circuit-level verification stage, can better realize function verification, and enables a designer to carry out adjustment in a chip design stage. Compared with the prior art, the method has the advantages that the verification time of two orders of magnitude is reduced, and a large amount of manpower and material resource cost is saved.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a method for adding random numbers in circuit-level verification of a memristor array module. Background technique [0002] The register transfer level model (hereinafter referred to as RTL) or the behavior level model of the memristor (hereinafter referred to as RRAM) array module refers to the simulation model that can simulate the function of the actual RRAM array module. ) to represent. The random scheme of this model means that on the basis of the original model, by injecting random numbers at its output end, the output of the model has a certain degree of randomness, which can simulate the output of the actual RRAM array module to achieve more effective verification at the circuit level . This solution plays an important role in the circuit-level verification of memristor-based memory-computing chips from design to implementation. [0003] RRAM is...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G11C13/00G06F8/41
CPCG11C13/0069G06F8/41
Inventor吴华强毕雨穆吴大斌唐建石高滨钱鹤
OwnerTSINGHUA UNIV