The present application relates to
chip verification technical field, especially to a kind of front-end low-power
verification environment generation method,
electronic equipment and medium, method includes steps S1, the
register transfer level code information A of
chip is obtained n And unified
power consumption format information B n ;Step S2, target configuration file is obtained;Step S3, the target configuration file is parsed, if C n It is set to first identification, then A1 n And B1 n Join target compilation file
list, if C n It is set to second identification, then A2 n And B2 n Join target compilation file
list;Step S4, at least one process angle corresponding
standard cell library information file is screened from each
standard cell library information file and joined target compilation file
list;Step S5, based on the target compilation file list compiles and generates front-end low-power
verification environment.The present application improves the generation efficiency and accuracy of front-end low-power verification environment.