95results about How to "Improve design productivity" patented technology

The relationship of correspondence between the RTL description and the behavioral description is extracted with ease. A behavioral synthesis device analyzes how the scheduling, preparation of a control data flow graph and the sharing of arithmetic processing units and registers are carried out. The behavioral synthesis device then formulates a table of correspondence to show the relationship of correspondence between the RTL description and the CDFG and a table of correspondence to show the relationship of correspondence between the CDFG and the behavioral description. A path determining device couples these tables of correspondence to generate a table of correspondence determining the relationship of correspondence between the RTL description and the behavioral description. The path determining device reflects a path of interest in the RTL description. The path determining device then outputs the behavioral description, corresponding to the RTL description, so that the behavioral description will be uniquely determined by the states of the FSM possessed by the RTL description and by the conditional branching in the behavioral description.

The invention discloses a system and method based on GIS distribution network graphic display. The system comprises a user data information recorder, a data operational unit, an information matching module, a data analyzer and a display module. The user data information recorder, the data operational unit, the information matching module, the data analyzer and the display module are sequentially connected. The method includes the steps of data information input, data operation, building of a new data storage, matching of corresponding data information, data analysis, generation of data information streams and display of the data information streams on the corresponding GIS graphs. By the adoption of the system and method, data size analysis efficiency is remarkably improved, complex chart data are converted into graphic display information easy to understand, and a distribution network is planned through a GIS through virtual image display.

The invention discloses a secondary design system for an intelligent substation on the basis of Excel. According to the technical problem to be solved, design personnel can finish primary and secondary design of the intelligent substation fast and conveniently. The system is arranged on a personal computer networking with a switch. The switch is connected with more than one computer terminals. An intelligent substation design paper module of the system is connected with a database module. The secondary design system is further provided with a secondary equipment calculation module and a secondary equipment analysis module. The secondary equipment analysis module is connected with the database module. The secondary equipment calculation module is connected with an Excel standard template and a parameter configuration file module. The parameter configuration file module is connected with a user interface module. Compared with the prior art, secondary equipment lists of the intelligent substation are output to the electric power bureau and used for bidding work of secondary equipment, a scheme primarily designed is fast guided into the normal design work of the intelligent substation, the design work efficiency of the intelligent substation is improved, and manpower waste is reduced.

The invention provides an integration design method of an intelligent substation based on a three-dimensional design platform and professional software, wherein two function modules, namely an equipment arrangement module and an equipment coding module are arranged in the three-dimensional design platform MicroStation; the equipment arrangement module is used for functions of equipment arrangement and attribute definition; the equipment coding module is used for equipment coding; codes as a part of equipment properties can be bound with equipment information, so that the position information can be extracted from the codes for the calculation of cable length. With the adoption of the integration design method of the intelligent substation based on the three-dimensional design platform and the professional software, through the integration use of Visual SCD (Security Coding Device) intelligent substation system integration design software and BRCM (Broadcom) cable laying software in the MicroStation platform, the intelligent substation construction drawing design and the system integration work are fused; and in such a way, besides the completion of a primary wiring diagram and a secondary wiring diagram of the conventional substation, the configuration of a complete data model of the whole station can be completed in the course of designing according to an ICD (Interface Control Document) model document provided by each equipment manufacturer and the configuration principles of primary equipment and secondary equipment of the substation.

The invention applies to the technical field of circuit design, and provides an updating method and an updating device for bills of material (BOMs). The updating method for the BOMs includes that an initial BOM of a second version is generated when a circuit schematic diagram is updated from being a first version to being a second version, or from a first version to a second version; the attribute of each component in the circuit schematic diagram of the first version is compared with that in the circuit schematic diagram of the second version; a component information list is generated according to comparative results, and the component information list comprises processing information which is collected from a processing BOM of a first version and corresponds to components which are identical in terms of attribute in the comparative results; and the initial BOM of the second version is combined with the component information list to generate a processing BOM of a second version. The updating method and the updating device for the BOMs greatly increase the updating efficiency of the BOM processing, and therefore the design production efficiency of a circuit system is promoted.

The invention relates to the field of fabricated buildings, in particular to an intelligent fabricated building construction method. The method comprises the steps of preliminary model design, whereinspace planning is conducted according to site analysis, building modeling, building landscape and traffic flow lines; Utilizing a BIM technology to form a building full model; Model design is optimized, the whole building model is placed in a specific simulation environment, and the house type, size and orientation of the building are perfected; Carrying out deepening model design, splitting theoptimization model into single components, and carrying out shape optimization, steel bar configuration and collision detection on the single components according to splitting of the components; According to the detection result, all the elements are adjusted, the relation among all the elements is further perfected, a component deepening detail drawing is directly obtained through the BIM model,and the drawing should comprise a component size drawing, a pre-buried positioning drawing and a material list table, and an H-dimensional view is constructed. And an intelligent design technology isutilized, so that the construction of the fabricated building is more standardized, process-oriented, automatic and intelligent.

The invention provides an encoding/decoding storage system with scalable input bit width. The encoding/decoding storage system comprises a read and write control circuit, a memorizer, an encoding circuit, a data cache device, a first-level address buffer, a second-level address buffer, first-level write enable buffer, a second-level write enable buffer and a control circuit, wherein the first-level address buffer is cascaded with the second-level address buffer; the first-level write enable buffer is cascaded with the second-level write enable buffer. According to the encoding/decoding storage system, a cache encoding/decoding mechanism is adopted, so that interactive storage between storage array and the buffers can be realized; when the bit width of the data which needs to be written in and externally provided can not meet the requirement on the memorizer, namely, part of coded data comes from the external input, and the other part of the coded data comes from the storage array, accurate encoding and decoding can be realized; furthermore, the error correcting capabilities are consistent under the condition of different bit widths, so that normal write-in and read-out operation can be carried out on the storage array.

The invention discloses a de-noising flight program design method based on aerial noise restricted area fitting. The method comprises the following steps: acquiring the flow, flow direction and model data of target airport prediction traffic flow; converting the noise level requirements of corresponding sensitive points such as schools and hospitals around an airport into an aerial noise restricted area in a three-dimensional space; establishing a spatial curved surface equation of a restricted area boundary by adopting least square fitting; and solving a tangent line from an initial way point to a curve surface to obtain a de-noising flight program with an optimal distance. Through adoption of the de-noising flight program design method, the conventional problem that the ground aerial noise can only be computed after design of the flight program is solved; the design working efficiency is increased; and the noise flight program design accuracy is increased through establishment of a noise restriction program solving model.

The invention relates to the technology for generating a report of a virtual terminal of an intelligent substation, in particular to a method for generating a dynamic report of a virtual terminal of an intelligent substation. The method comprises the steps that firstly, a system extracts an original data set of the virtual terminal from computer aided design software of the intelligent substation, secondly, a user sets a specified virtual terminal report format on a system virtual terminal report format user-defined interactive interface, thirdly, the system extracts a virtual terminal item requested to be expressed by the format from the set format to serve as a virtual terminal report data set, and fourthly, the virtual terminal report data set is led out to an Excel table according to the format request set by the user. The method can solve the problems that the format of the report of the intelligent substation virtual terminal is fixed and cannot meet requirements of different users, meanwhile, the software maintenance workload of developers is reduced, and the design efficiency and quality of the intelligent substation virtual terminal are obviously improved.

The invention discloses a method for optimizing efficient clock tree physical wiring in rear-end design of integrated circuit semi-customization. The method comprises the following steps of:S1, obtaining wiring resource information by a rear-end design tool according to a chip shape and an internal component layout plan; S2, gradually checking and judging whether clock tree signals wire is reasonable or not according to the wiring resource information and sequences of check items with preset priorities, if the judging result is positive, returning to the step S1, and otherwise, executing stepS3; and S3, gradually optimizing the clock tree signal wires according to sequences of optimization items with preset priorities, outputting an optimization result, and executing the step S2 at the same time until all the check items are completed. According to the method for optimizing efficient clock tree physical wiring in rear-end design of integrated circuit semi-customization, the design quality of clock tree design is improved, benefit is brought to improve the working efficiency of chip design, the ineffective work and design iteration frequency are decreased, and the chip design period is finally shortened.

The invention provides a multistage wheel disc rotor structure interactive design method driven by geometrical features and oriented to engineering requirements. The method comprises the following steps of 1, inputting control point coordinate values of a multistage wheel disc meridian plane geometrical structure; 2, building a multistage wheel disc structure axisymmetric finite element model forthe multistage wheel disc meridian plane geometrical structure; 3, analyzing the structure of the built multistage wheel disc structure axisymmetric finite element model; 4, obtaining the multistage wheel disc meridian plane geometrical structure which meets the design requirement and outputting a CAD model. Through the steps, the change of the control point coordinate values of the multistage wheel disc meridian plane geometrical structure can be automatically displayed, the working efficiency of designing a multistage wheel disc structure is improved to a great extent, the problems existingin the prior art during design that the time and labor cost are wasted when an optimizing algorithm is not steady, and artificial remodeling is needed once the scheme is changed during design in the prior art are solved, and finite element mesh dividing and multistage wheel disc structure design can be achieved.

Apparatus and methods are disclosed for implementing block-based processors including field programmable gate-array implementations. In one example of the disclosed technology, a block-based processorincludes an instruction decoder configured to generate decoded ready dependencies for a transactional block of instructions, where each of the instructions is associated with a different instructionidentifier encoded in the transactional block. The processor further includes an instruction scheduler configured to issue an instruction from the set of transactional block of instructions out of order. The instruction is issued based on determining that decoded ready state dependencies for an instruction are satisfied. The determining includes accessing storage with the decoded ready dependencies indexed with a respective instruction identifier that is encoded in the transactional block of instructions.

Apparatus and methods are disclosed for implementing block-based processors, including field programmable gate-array (FPGA) implementations. In one example of the disclosed technology, an instructiondecoder configured to generate ready state data for a set of instructions in an instruction block, each of the set of instructions being associated with a different instruction identifier encoded in the transactional block and a parallel instruction scheduler configured to issue an instruction from the set of instructions based on the decoded ready state data. In some examples, the parallel instruction scheduler allows for improved area and energy savings according to the size and type of FPGA components available.

The invention discloses a method for designing a tire die on the basis of Excel and CAD (computer aided design) platforms. The method comprises the following four steps of generating a die standard drawing, creating an Excel platform data processing base, inputting data and creating a function relationship, and storing the data. The method can also be widely applied to design work for a plurality of dies, the defect that each die is required to be independently calculated and designed in the traditional die design is effectively avoided, and the working efficiency of die design is greatly improved; meanwhile, on one hand, the calculation intensity of related parameters in the traditional die design is reduced, the traditional requirement on drawing precision of the die is weakened, the workload of drawing is reduced, and the die designing efficiency is greatly improved, on the other hand, while the die is designed, making work, such as making a part production technical table can also be finished, the workload of designing traditional die machine processing working procedures and making a working procedure sheet is avoided, the workload of mechanical processing is reduced, and the working efficiency is improved.

The invention discloses a conductor path real-time calculation and inspection method and engine. The method includes the steps: (1) receiving inputted geometric data and constraint conditions; (2) inspecting and outputting a conductor path breaking the constraint conditions by the traverse path real-time calculation and inspection engine; (3) back-annotating the conductor path breaking the constraint conditions to a layout design interface and assisting in correcting layout. According to the conductor path real-time calculation and inspection method and engine, when layout data are incomplete, results can be rapidly obtained only by inspecting the geometric data (including conductor polygonal shapes and conductor contact points) of a conductor material layer, real-time inspection requirements are met, and calculation amount is small.

A prototype structure of woman's coat, a method for designing pattern and a test pattern for said prototype are disclosed. A prototype measuring instrument is directly used to measure the sizes of human body for obtaining the associated structure data, which is used in conjunction with the prototype testing pattern to form the prototype structure and design the prototype pattern. Its advantages are high efficiency and correctness, and easy operation.

The invention discloses a method for automatically deleting invalid via holes in Cadence software. The method comprises the following steps of step 1, modifying a menu bar of Allegro software and adding Skill in the menu bar; step 2, modifying a file in a directory and adding the skill into a calling sequence; and step 3, placing the file in a directory and executing a Delete Unconnected Via command in the menu bar in order to automatically delete the invalid via holes. The method has the advantages of reasonable design, convenience for use, high working efficiency and the like, due to the fact that a Skill extension program loading interface is reserved in the CadenceAllegro software, a PCB design engineer can develop an extension function on the basis of original software by using an Allegro development language, the redundant via holes can be quickly positioned, manual deletion of reports is not needed, and a Layout engineer can quickly delete the invalid and redundant via holes through the Skill, so that the PCB design work efficiency is improved, and the workload of the PCB design engineer is effectively reduced.

The invention discloses a dual-station energy-saving plug automatic plug-in device and an automatic plug-in method. The automatic plug-in device comprises a base and an indexing rotating device fixedon the base, a loading and unloading device, a housing press-in device, a first terminal feeder, a first terminal fitting device, a second terminal feeding device, a second terminal fitting device anda detection rejecting device; wherein the feeding device, the housing press-in device, the first terminal feeding device, the first terminal fitting device, the second terminal feeding device, the second terminal fitting device and the detection rejecting device are arranged around the indexing rotating device counterclockwise; the invention has the advantages of high production efficiency and low production cost by adopting the double-station design, high qualification rate of products provided with a detection and rejection device, and realizes automatic insertion of terminals, automatic detection and wide application range through the cooperation of a loading and unloading device, a terminal feeding device, a terminal assembly device and a detection and rejection device.

Apparatus and methods are disclosed for implementing incremental schedulers for out-of-order block-based processors, including field programmable gate array implementations. In one example of the disclosed technology, a processor includes an instruction scheduler formed by configuring one or more look up table RAMs to store ready state data for a plurality of instructions in an instruction block.The instruction scheduler further includes a plurality of queues that store ready state data for the processor and sends dependency information to ready determination logic on a first in/first out basis. The instruction scheduler selects one or more of the ready instructions to be issued and executed by the block-based processor.

A communication system includes a transmission device that transmits an information signal having information defined as a binary state value, the transmission device including a signal generation unit that generates an information decryption signal to transmit the information decryption signal together with the information signal, wherein the state value of the information decryption signal is unchanged when the state value of the information signal is changed, whereas the state value of the information decryption signal is changed when the state value of the information signal is unchanged; and a reception device that receives the information signal and the information decryption signal, the reception device including an information acquisition unit that acquires the state value of the information signal based on a changing timing of the state value of each of the information signal and the information decryption signal received.

The invention relates to the technical field of massive data query management, in particular to a complicated query method based on attributes which is specially applicable to fabric data management and can effectively improve the fabric management efficiency. The method is characterized in that a data storage database is initially built, wherein each attribute corresponds to a field of an integer type; each attribute value is saved as the nth power of 2, and bitwise AND operation is used during query, wherein the query method comprises the steps that attribute values to be searched are summed during query, a retrieval value is obtained by means of & operation of SQL, query is conducted in the storage database through the retrieval value, and a fabric with the attributes to be searched is obtained. By means of the complicated query method based on the attributes, the query efficiency can be greatly improved, script complexity is reduced, the efficiency of fabric data management is improved, and thus the design and production efficiencies are improved.

A measuring instrument for designing the prototype and templates of clothes features that it can be directly fixed to human body to measure the sizes of different parts on human body to obtain a series of structural data, which can be used to design the prototype and templates of clothes. Its advantages are simple operation, high correctness and high efficiency.

The invention discloses a mechanical device for resistance spot welding. The mechanical device for resistance spot welding comprises a soldering pliers body, an integrated servo motor connected to thesoldering pliers body and a transformer connected to the soldering pliers body, wherein the soldering pliers body comprises an upper electrode, a lower electrode, a movable arm, a stationary arm, a movable arm base, a pliers body and a pliers body supporting shaft; the upper electrode and the lower electrode are arranged up and down according to a working position; mounting holes are reserved inthe movable arm seat and a stationary arm seat; the servo motor is connected to the pliers body through servo fixing screws on two sides; a flange is arranged on the end part of the servo motor; a push rod of the servo motor is connected to the movable arm seat through a hinge block; the pliers body supporting shaft is arranged in the middle of the pliers body; the pliers body supporting shaft isconnected to a fixed side plate of the transformer; a water distributor is arranged on the upper part of the fixed side plate of the transformer; the pliers body is connected to a spring balancing mechanism; and a conducting block and a conducting bar are arranged between the fixed side plate of the transformer and the pliers body. The mechanical device for resistance spot welding disclosed by theinvention achieves a modular standardized design of the soldering pliers body, is compact in structure and convenient to replace, and the utilization ratio of the equipment is improved.

The invention provides a domestic flight controller designed based on a core board, the core board mainly comprises a DSP+FPGA main control chip, a configuration chip and a secondary power conversion circuit, the core board only leads out an interface connected with a peripheral circuit and a core board power supply interface, and a bottom board provides power for the core board and partial interface function modules. The interface and the power supply and distribution management board realize power supply conversion of the controller and other interface function modules. The flight controller can implement functions of serial port communication, a 1553B bus, GPIO, steering engine drive control, an acquisition circuit, a power supply system, equipment activation control, GPS signal acquisition, inertial measurement unit data acquisition and the like. According to the invention, a high-performance domestic DSP+FPGA main control chip architecture is selected, the operation speed and the data processing capability of the controller are improved, FPGA logic resources are fully utilized to realize the design of maximizing interface functions, the universality of the controller is greatly improved, and the controller has the characteristics of simple design, convenience in debugging, rich interface functions, autonomous and controllable development cycle and the like.

The invention discloses a complex system module division method based on system, function and structure layering, and belongs to the field of modular manufacturing. The method comprises the followingsteps: firstly, establishing an SFS hierarchical model, and establishing a module division principle based on a functional structure and a DFX on the basis of the SFS hierarchical model; then providing a pre-division principle for module pre-division, and reducing the complexity of the system; under the guidance of a module division principle, establishing each sub-correlation matrix, and establishing a comprehensive correlation matrix according to the weight; solving a granularity interval of the module, and generating a module division scheme set in combination with an improved genetic algorithm and an FCM clustering algorithm; and evaluating the module division scheme set to obtain an optimal module division scheme. A complex product system is divided into reasonable modules, preparation is made for subsequent module configuration, assembly, recovery and the like, and the design and production efficiency is improved.