Verification method, device and apparatus of a transistor-level circuit and computer readable storage medium
A transistor-level, verification method technology, applied in computing, electrical digital data processing, special data processing applications, etc., can solve problems such as area waste, and achieve the effect of improving verification efficiency and accuracy
Active Publication Date: 2019-07-05
CHANGXIN MEMORY TECH INC
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Problems solved by technology
[0003] However, the area and power consumption requirements of the overall circuit in DRAM (Dynamic Random Access Memory) are much higher than those of ASIC, and the area and power consumption are directly An important factor affecting the manufacturing cost. Using the same design process as ASIC will inevitably result in waste of area and unnecessary power consumption. Therefore, DRAM design can only use transistor-level circuits as the smallest unit for building circuits.
Since the ASIC standard cell verification method does not require analog circuits, and the DRAM of transistor-level circuits must simulate the actual circuit when verifying, the ASIC signal verification method is not suitable for the DRAM verification method.
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[0049] In the following, only some exemplary embodiments are briefly described. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. Accordingly, the drawings and descriptions are to be regarded as illustrative in nature and not restrictive.
[0050] In describing the present invention, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", " Back", "Left", "Right", "Vertical", "Horizontal", "Top", "Bottom", "Inner", "Outer", "Clockwise", "Counterclockwise", "Axial" , "radial", "circumferential" and other indicated orientations or positional relationships are based on the orientations or positional relationships shown in the drawings, which are only for the convenience of describing the present invention and simplifying the description, rather than indicating or im...
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The invention provides a verification method of a transistor-level circuit. The method comprises the following steps of firstly, establishing a verification platform,wherein the verification platformcan simulate the transistor level circuit function of the semiconductor memory; inputting a function test signal to the transistor level circuit to generate a first verification signal, inputting a function test signal to the verification platform for simulation; enabling the verification platform to compare the first verification signal with the simulation result to obtain the verification information of the transistor-level circuit, so that the function verification of the transistor-level circuit is realized, the verification efficiency and accuracy are improved, and the transistor-level circuit can be modified through the obtained verification information. The invention further provides a verification device of the transistor-level circuit, verification equipment of the transistor-level circuit and a computer readable storage medium.
Description
technical field [0001] The invention relates to the field of semiconductor storage, in particular to a method for verifying transistor-level circuits, a verification device for transistor-level circuits, a verification device for transistor-level circuits, and a computer-readable storage medium. Background technique [0002] With the rapid and continuous development of the integrated circuit industry, integrated circuit (IC, Integrated Circuits) testing has become an important link in the process of integrated circuit design, manufacturing, packaging and application, throughout the entire production and application process of IC. Usually, a verification platform is used to carry out standardized tests on the signals in the internal circuits of integrated circuits, specifically according to the standard protocol of integrated circuits and using ASIC (Application Specific Integrated Circuits) designed by ultra-high-speed integrated circuit hardware description language for test...
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IPC IPC(8): G06F17/50
CPCG06F30/398
Inventor刘格言
OwnerCHANGXIN MEMORY TECH INC