A Logical Encryption Method for Integrated Circuit Function Output Protection

An output protection, integrated circuit technology, applied in the field of logic encryption of integrated circuit function output protection, can solve the problems of many iterations, long time, long encryption time, etc., to achieve the effect of improving the degree of confusion and reducing the number of encryption iterations

Active Publication Date: 2021-12-21
HANGZHOU INNOVATION RES INST OF BEIJING UNIV OF AERONAUTICS & ASTRONAUTICS
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  • Abstract
  • Description
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Problems solved by technology

However, when the algorithm is used for loop iterations, in order to find the target position that satisfies the fitness function, too many iterations are required, which will cause a long encryption time; when random loop iterations are used for iterative encryption, the obtained nodes that meet the conditions are not It must be the node position that has the greatest impact on output protection, and it also has the disadvantages of many iterations and long time

Method used

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  • A Logical Encryption Method for Integrated Circuit Function Output Protection
  • A Logical Encryption Method for Integrated Circuit Function Output Protection
  • A Logical Encryption Method for Integrated Circuit Function Output Protection

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Embodiment Construction

[0031] The present invention will be further described below in conjunction with the accompanying drawings.

[0032] A kind of logical encryption method for the protection of integrated circuit function output proposed by the present invention, the main purpose is to prevent an attacker from using the output to crack the key or insert a hardware Trojan horse that leaks information after the circuit is logically encrypted. The protected circuit design file can be a circuit that has been processed by logic encryption before, and the circuit design file mentioned in the present invention and the unencrypted circuit design file can be a circuit file that has been inserted into a key through logic encryption before. Contains AND, OR, NOT gate logic units.

[0033] The present invention mainly can be divided into two steps:

[0034] like figure 1 As shown, in the first step, in order to focus the processing on the circuit nodes that have a greater impact on the output Hamming dist...

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Abstract

The invention proposes a logic encryption method for integrated circuit function output protection, which belongs to the field of hardware security. It is mainly divided into two steps, one is to obtain the output sensitivity of each AND, OR, and non-logic unit in the circuit; the second is to sort the output sensitivity of each logic unit, as a priority index of the encryption cycle, according to the priority from high to high Exactly performs logical encryption processing. The present invention focuses on the position of the logical unit node that has the greatest impact on the output Hamming distance, so that the subsequent encryption algorithm reduces the number of key gate insertions to reduce hardware overhead, and proceeds on the basis of a certain priority. Encryption loop, which can reduce the number of encryption iterations.

Description

technical field [0001] The invention belongs to the field of hardware security, and relates to a logic encryption method for protection of integrated circuit function output. Background technique [0002] All stages of the modern integrated circuit supply chain may be subject to security threats. There are hardware security vulnerabilities in every link of design, manufacturing, testing, deployment, and application. Attackers can use these vulnerabilities to insert hardware Trojans to cause irreversible damage to integrated circuits. . [0003] In the functional design and physical design stages of the integrated circuit, the logic encryption technology implants a built-in locking mechanism in the original design of the integrated circuit, so that the circuit will only perform the correct operation when the correct key is entered, and the correct key will be obtained. output, which can effectively prevent attackers from implanting hardware Trojan horses in the circuit or re...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F21/72
CPCG06F21/72
Inventor 王珺珺刘情
Owner HANGZHOU INNOVATION RES INST OF BEIJING UNIV OF AERONAUTICS & ASTRONAUTICS
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