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Chip packaging structure

A chip packaging structure and chip technology, applied in electrical components, electrical solid devices, circuits, etc., can solve problems such as difficulty in achieving thinness

Inactive Publication Date: 2005-02-09
MACRONIX INT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

With such a structure, it is difficult to realize thin and small semiconductor devices

Method used

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  • Chip packaging structure
  • Chip packaging structure
  • Chip packaging structure

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Embodiment Construction

[0022] Please refer to figure 2 , figure 2 is a cross-sectional view showing the package structure according to the present invention.

[0023] In this embodiment, the chip 101 has an active surface 101a and an opposite non-active surface 101b, wherein the active surface 101a has a central portion and a peripheral portion. Also, the peripheral portion has a plurality of pads 103 .

[0024] In addition, the chip support seat 102 is bonded to the central part of the active surface 101a of the chip 101 by using, for example, a solid or liquid non-conductive adhesive. Wherein the area of ​​the above-mentioned chip supporting seat 102 is smaller than the area of ​​the active surface 101a of the above-mentioned chip 101, therefore, the above-mentioned chip supporting seat 102 arranged on the surface of the above-mentioned chip 101 will not affect the above-mentioned plurality of pads around the active surface 101a of the above-mentioned chip 101 103.

[0025] Moreover, a plura...

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Abstract

The chip sealing structure has one wire holder as chip support seat adhered to the action surface of chip. The chip support seat has area is small than the chip action area, and several leads are used in connecting the soldering pads around the chip action area and the leading out pins in the wire holder. Then, the most outer layer is covered with one packing glue, to make the non-action surface of the chip or the non-adhered surface of the chip support seat expose beyond the packing glue.

Description

technical field [0001] The invention relates to a chip packaging structure, and in particular to a thin chip packaging structure. Background technique [0002] With the advancement of semiconductor technology, electronic products are developing towards light, thin, short, small and multifunctional trends, and the working speed and design complexity of semiconductor chips are increasing day by day. Therefore, semiconductor packaging is also constantly innovating in order to improve packaging efficiency and reduce the volume of the package. [0003] see figure 1 , figure 1 is a cross-sectional view showing the structure of a conventional chip package. The chip 1 is glued on the chip support base 2 with its non-active surface, and the active surface of the above-mentioned chip 1 has a plurality of pads 3 . A plurality of lead-out legs 4 are arranged on opposite sides of the chip 1 , and a plurality of wires 5 are used to electrically connect the plurality of pads 3 on the a...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/12H01L23/28H01L23/48
CPCH01L2224/48091H01L2224/48247H01L2224/4826H01L2224/48465H01L2224/49175
Inventor 蔡振荣林志文
Owner MACRONIX INT CO LTD