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Chip encapsulation structure and its making method

A technology of chip packaging structure and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc.

Active Publication Date: 2007-07-11
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] The purpose of the present invention is to provide a chip packaging structure and its manufacturing method, which overcomes the defect that the edge part of the existing low dielectric constant chip is easily broken, effectively protects the edge of the low dielectric constant chip and prevents it from being damaged by collision or vibration. broken

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  • Chip encapsulation structure and its making method
  • Chip encapsulation structure and its making method
  • Chip encapsulation structure and its making method

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Embodiment Construction

[0011] Please refer to FIGS. 1A and 1B at the same time. FIG. 1A is a schematic cross-sectional view of a chip package structure with a planar annular reinforcement in accordance with the characteristics of the present invention, and FIG. 1B is a chip package with a turning ring reinforcement in accordance with the characteristics of the present invention Schematic cross-sectional view of the structure. As shown in the figure, the chip packaging structure 100 includes a carrier 102, a chip 104, a reinforcement and a glue 108. The carrier 102 is, for example, a substrate, and the chip 104 is, for example, a low-k (low-K) chip. The chip 104 has an upper surface 104a, a lower surface 104b, and an outer sidewall 104c. The lower surface 104b is disposed on the carrier 102. The surface 104a is electrically connected to the carrier 102 through the circuit 110. The reinforcement covers the edge of the upper surface 104a to protect the edge. The way the reinforcement covers this edge is sh...

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Abstract

This invention discloses one chip sealing structure and its process method, wherein, the structure comprises load part, chip, fixing object and glue part; the method comprises the following steps of setting chip down surface onto load and fixing the cover onto chip edge for protection and bonding the chip surface and load part and finally forming glue covering chip, fix part and load.

Description

【Technical Field】 [0001] The invention relates to a chip packaging structure and a manufacturing method thereof, in particular to a chip packaging structure with a reinforcement and a manufacturing method thereof. 【Background technique】 [0002] In the prior art, because the material of the chip of the chip package structure is fragile, the edge of the upper surface of the chip is prone to chipping. This situation is particularly likely to occur on low-k chips. Due to better telecommunication performance and faster signal transmission speed, low-dielectric constant chips are widely used in the industry. Therefore, how to solve the problem that chip edges are easily broken has become an important research topic for those skilled in the art. [Summary of the invention] [0003] The purpose of the present invention is to provide a chip packaging structure and a manufacturing method thereof, which overcomes the defect that the edge part of the existing low-dielectric constant chip is...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/31H01L23/49H01L21/56H01L21/60
CPCH01L2924/01019H01L2224/4899H01L2224/48227
Inventor 丁一权
Owner ADVANCED SEMICON ENG INC