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Flash storage device and data reading and writing method thereof

A flash memory storage and data writing technology, which is applied in the direction of electrical digital data processing, response error generation, instruments, etc., can solve the problem of increasing the number of ECC code digits, and achieve the effect of enhancing error correction capabilities

Inactive Publication Date: 2009-02-04
FORTUNE SPRING TECH SHENZHEN CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] The purpose of the embodiments of the present invention is to provide a flash memory storage device, which aims to solve the problem of doubling the number of ECC code bits when the data of one sector is distributed in multiple flash memories in the existing flash memory storage device

Method used

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  • Flash storage device and data reading and writing method thereof
  • Flash storage device and data reading and writing method thereof
  • Flash storage device and data reading and writing method thereof

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Embodiment Construction

[0036] In order to achieve the above objectives and effects, the method and process of the present invention are drawn and detailed.

[0037] The present invention uses a new ECC code storage method to break through the limitation that one sector of the traditional flash memory can only use 16 bytes to store ECC codes, and upgrade the architecture of 512 bytes (sector size) + 16 bytes (ECC code) to ( N*512+N*16) byte architecture. This architecture allows N sectors to share a set of ECC codes, increasing the length of ECC codes to improve the error correction capability of ECC. When N=2, as shown in Figure 3, the flash memory provides a 16-byte Spare area for each sector, so the Spare area of ​​two sectors can have up to 32 bytes. According to Reed-Solomon ECC algorithm theory, 32 bytes can provide 11 bytes of error correction capability for two sectors of data. When N=3, such as Figure 4 As shown, there can be 48 bytes of space for ECC encoding, and 17 bytes of error correction ...

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Abstract

A method for carrying out error revision coding on multiple sector includes raising frame of 512 byte + 16 byte to be frame of N* 512 + N* 16 enabling to revise 6 byte error when N is 1 and enabling to revise 11 byte error when N is 2 according to Reed-Solomon ECC algorithm theory, enabling to increase ECC error revision ability fast according to principle as above mentioned when N is greater number.

Description

Technical field [0001] The present invention belongs to the field of flash memory storage, and proposes a new ECC architecture that can be applied to all flash memory storage devices currently on the market. This method is no longer limited to the traditional ECC code storage method, and can improve the error correction code (ECC) Correction ability, especially when it is applied to multiple flash memories that need to be accessed at the same time, the capacity of the flash memory storage device will not be reduced. This method can meet the application of flash memory in the future such as SSD (Solid State Disk) solid state drives. Background technique [0002] At this stage, many electronic products are developing in the direction of miniaturization, personalization, and portability. In addition to the storage media of such small electronic devices using flash memory, the storage media of other electronic devices have gradually changed from the early magnetic tapes and disks to ...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/10G06F13/28
CPCG06F11/1068
Inventor 林清益
Owner FORTUNE SPRING TECH SHENZHEN CORP