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Germanium silicon heterogeneous crystal transistor with elevated external base area and its making technology

A technology of heterojunction transistors and preparation processes, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc. It can solve problems such as base region widening, doping change, boron enhanced diffusion, etc., and achieve DC and high frequency The effect of feature enhancement

Inactive Publication Date: 2008-01-16
中国电子信息产业集团有限公司 +1
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  • Summary
  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0003] In the original germanium-silicon heterojunction transistor process, the outer base region adopts the implantation process, and the defects generated by the implantation will lead to serious boron-enhan

Method used

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  • Germanium silicon heterogeneous crystal transistor with elevated external base area and its making technology
  • Germanium silicon heterogeneous crystal transistor with elevated external base area and its making technology
  • Germanium silicon heterogeneous crystal transistor with elevated external base area and its making technology

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[0024] The invention provides a raised outer base region silicon germanium heterojunction transistor and a preparation process. In the structure diagram of the raised outer base silicon germanium heterojunction transistor shown in FIG. 14, the structure of the transistor includes the collector formed by the Si substrate 12, the base SiGe layer 14, the outer base conductive layer 22, and the structure of the transistor. The polysilicon layer 34 of the emitter. The structure of the transistor is that a SiGe layer 14 is epitaxially grown on a substrate 12, and an outer base conductive layer 22 is deposited on the SiGe layer 14. On the outer base conductive layer 22, the dielectric layer 28 is adjacent to the dielectric layer 28 on the side of the polysilicon layer 34. It is the silicide structure layer 42, between the vertical arm of the polysilicon layer 34 and the outer base conductive layer 22 and the dielectric layer 28, a wedge-shaped sidewall structure composed of a thin dielec...

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Abstract

The invention discloses a Ge-Si heterojunction transistor with an elevated external base and the preparation technique thereof, pertaining to the field of semiconductor devices and the preparation technology thereof. The heterojunction transistor comprises a collector formed with silicon substrate, a SiGe layer base and an external base, and a polysilicon emitter. A sidewall structure layer is equipped between the emitter and the base electrode, the external base is elevated, and the sidewall structure layer thereof prevents the emitter and the base electrode leaking. By using the technique of elevating the external base and the epitaxial growth technology of the external base, the invention overcomes the drawbacks that the prior injection technique of the external base in the Ge-Si heterojunction transistor technology leads to the serious Boron enhanced diffusion of the intrinsic base under the window of the emitting region, and thereby the invention makes the base wider and the doping changed, and reduces the fT and fmax parameters of devices. Therefore, the direct current and high frequency characteristics of devices are improved greatly.

Description

technical field [0001] The invention belongs to the technical field of semiconductor devices and their preparation, and in particular relates to a germanium-silicon heterojunction transistor with an elevated outer base region and a preparation process thereof. Background technique [0002] SiGe heterojunction transistors are gradually used in the field of microwave circuits due to their excellent high-frequency performance and low cost advantages. The SiGe heterojunction transistor introduces epitaxial silicon-germanium alloy into the base region to reduce the bandgap width of the base region, thereby greatly improving the DC and high-frequency characteristics of the device. [0003] In the original germanium-silicon heterojunction transistor process, the implantation process is used in the outer base region, and the defects generated by the implantation will lead to serious boron-enhanced diffusion in the intrinsic base region under the emitter window, which will cause the ...

Claims

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Application Information

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IPC IPC(8): H01L29/737H01L29/06H01L21/331
Inventor 王玉东周卫徐阳付军张伟蒋志钱佩信
Owner 中国电子信息产业集团有限公司
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