Non-self aligning raising externally basilar space germanium-siliconhetero-junction transistor and technique of preparing the same
A heterojunction transistor and fabrication process technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of base area widening, doping change, boron enhanced diffusion, etc., and achieve DC and high frequency. The effect of feature enhancement
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[0020] The manufacturing process steps of the non-self-aligned raised extrinsic base germanium silicon heterojunction transistor are as follows:
[0021] 1) Epitaxially grow a SiGe layer 14 on a Si substrate 12, and then grow a silicon oxide dielectric layer 16, such as, and then expose to form a photolithographic pattern of an opening in the middle of the silicon oxide dielectric layer 16 (as shown in FIG. 1 ).
[0022] 2) Deposit a layer of polysilicon layer 18 on the basis of the photolithography pattern shown in Figure 1, deposit dielectric layer 22 on the polysilicon layer 18, then photolithography etching forms the columnar composite layer 20 ( As shown in FIG. 2 ), the function of the dielectric layer 22 is to regenerate a polysilicon layer on the polysilicon layer 18 blocking the emitter during selective epitaxy.
[0023] 3) Continue to deposit a thin dielectric layer 24 (such as silicon oxide), and then deposit a uniform dielectric layer 26 (as shown in FIG. 3 ), the ...
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