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Data processing device

A technology of data processing device and processor, which is applied in the direction of electrical digital data processing, instrumentation, calculation, etc., and can solve the problems of increasing hardware and increasing processing time, etc.

Inactive Publication Date: 2008-06-04
PANASONIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, it becomes more important to increase the hardware
[0011] In addition, since software processing for operating identification information is required, it becomes a factor of increasing processing time

Method used

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Experimental program
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no. 2 Embodiment approach 》

[0055] Next, a second embodiment of the present invention will be described.

[0056] In the step of setting the layout address (step ST001 ) shown in the first embodiment, when the instruction sequence stored in the development RAM 121 is executed from the instruction RAM 121 and the rest of the program is executed from the main storage device 110, the repetition of addresses becomes question. That is to say, in the configuration address setting method of RAM 121 considering only the overlapping commands for the address of a plurality of command lines executed on RAM 121, the address of the command line executed on RAM 121 and the address of the command line executed on main storage device 110 are The address of the command line, which may be repeated.

[0057] Therefore, in this embodiment, when executing the command sequence executed from the main storage device 110, as shown in step ST201 of the flowchart of FIG. The same address as the address of (the main storage devic...

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Abstract

In a data processing device including a main memory for storing therein a plurality of instruction streams and a processor for executing an instruction stream transferred from the main memory, the processor includes: an instruction RAM for storing therein the instruction stream transferred from the main memory; a location address setting section for setting location addresses on a memory space at which the instruction RAM will be placed; and an instruction fetch control section for determining, based on the location addresses set by the location address setting section, a space to be accessed by an instruction fetch access, and, according to result of the determination, making access to either the main memory or the instruction RAM. The location address setting section sets the location addresses in such a manner that location addresses, on the memory space, of the instruction stream stored in the instruction RAM do not coincide with location addresses, on the instruction RAM, of another instruction stream.

Description

technical field [0001] The present invention relates to a data processing device including a processor that transmits an instruction sequence stored in a flash memory or the like to a RAM (Random Access Memory) to execute the instruction. Background technique [0002] Processors such as microcomputers often have a relatively high-speed and small-capacity RAM (called "command RAM") compared to main storage devices such as main storage devices and ROM (ReadOnly Memory). The program stored in the device is appropriately transferred to the command RAM and then executed. In this way, a program whose size is not restricted by the capacity of the command RAM can be executed on the RAM capable of high-speed operation, and processing performance can be improved (this technique is often called "overlay technique"). [0003] In the above processor, for example, as shown in FIG. 11 , in the address of the command RAM, at a certain time T1, the command C1 of the command sequence P1 is s...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/312
CPCG06F9/3851G06F9/328
Inventor 樋口浩太朗宫地信哉
Owner PANASONIC CORP