Shallow slot isolation structure and manufacturing method

Abstract

Provided is a shallow slot isolation structure and a manufacturing method. The shallow slot isolation structure is formed by secondary etching, secondary filling and secondary polishing, and a formed STI structure is not a rectangular structure or a trapezoid structure in the prior art but a stereostructure with a wide middle and a narrow top and a narrow bottom. Therefore, even if two sides of the STI structure of an n pit and a p pit are not symmetrical caused by mask shifting during the n pit or the p pit manufacturing, active area communication of the p pit and the n pit is not caused, or active area communication of the n pit and the p pit is not caused due to the existing of the wide middle of the STI structure. Since an upper area of the STI structure is manufactured, the manufactured STI structure is guaranteed to be in a semiconductor substrate and is not higher than the semiconductor substrate. Therefore, by the aid of the method and the STI structure, during subsequent n pit or p pit manufacturing and under the condition of the mask shifting, active areas in the p pit and the n pit are guaranteed to be completely isolated or active areas in the n pit and the p pit are guaranteed to be completely isolated. And by the aid of the method and the STI structure, an active area of the semiconductor substrate is guaranteed to be completely isolated.

Description

technical field [0001] The invention relates to the manufacturing technology of semiconductor devices, in particular to a manufacturing shallow trench isolation structure and a manufacturing method. Background technique [0002] In the manufacturing process of semiconductor devices, shallow trench isolation (STI, Shallow Trench Isolation) structures are fabricated on semiconductor substrates. The fabrication of STI structures is a process for isolating regions between active regions of transistors fabricated on a substrate. [0003] figure 1 A flow chart of a method for making an STI structure on a semiconductor substrate in the prior art, combined with Figure 2a ~ Figure 2d A schematic diagram of the process sectional structure of the process of making an STI structure on a semiconductor substrate in the prior art shown, for detailed description: [0004] Step 101, providing a semiconductor substrate 11, oxidizing the semiconductor substrate 11 to form a first oxide laye...

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Problems solved by technology

[0014] However, in the process of forming the n-well and p-well on both sides of the STI structure, the photolithography process used in the exposure process may cause the p-well mask layer or The n-well mask layer is offset. At this time, the p-well and n-well made according to the p-well mask layer or n-well mask layer are asymmetrical on both sides of the STI structure. For example, the n-well is relatively large, and the p-well is relatively large. Small

Therefore, the subsequent active region fabricated in the p-well may not be isolated from the n-well by the STI structure, such as Figure 4 As shown, or the subsequent active region fabricated in the p-well may not be able to be isolated from the n-well by the STI structure, making the final semiconductor device fail

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