Semiconductor device and manufacturing method thereof

Abstract

A semiconductor device and a method for fabricating the semiconductor device are disclosed. An exemplary semiconductor device includes a substrate and a 3D structure disposed over the substrate. The semiconductor device also includes a dielectric layer disposed over the 3D structure, a WFMG layer disposed over the dielectric layer, and a gate structure disposed over the WFMG layer. The gate structure traverses the 3D structure and separates the source and drain regions of the 3D structure. The source and drain regions define a channel region therebetween. The gate structure induces stress in the channel region.

Description

technical field [0001] The present invention generally relates to the field of semiconductors, and more particularly, to semiconductor devices and manufacturing methods thereof. Background technique [0002] The semiconductor integrated circuit (IC) industry has undergone rapid development. In the course of IC evolution, functional density (ie, the number of interconnected devices per chip area) generally increases, while geometry size (ie, the smallest component (or line) that can be made using a fabrication process) decreases. This scaled-down process often offers advantages by increasing production efficiency and reducing associated costs. This scaling down also increases the complexity of handling and manufacturing of ICs, and similar developments in IC manufacturing are required for these advances to be achieved. [0003] For example, fabrication and design challenges arise in the development of three-dimensional (3D) designs as semiconductor processes advance to nano...

AI Technical Summary

Problems solved by technology

While existing 3D devices and methods of fabricating 3D devices are generally adequate for their intended purposes, they are not yet fully up to par in all respects as device scaling continues

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