Fast arithmetic multi-bit serial pulse dual-base binary finite field multiplier

A dual-substrate, multi-bit technology, which can be used in calculations using the number system, calculations using non-contact manufacturing equipment, etc., and can solve problems such as high latency

Inactive Publication Date: 2013-07-03
HARBIN INST OF TECH SHENZHEN GRADUATE SCHOOL
View PDF4 Cites 2 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The technical problem solved by the present invention is: to construct a multi-bit series pulse double-base binary finite field multip...

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Fast arithmetic multi-bit serial pulse dual-base binary finite field multiplier
  • Fast arithmetic multi-bit serial pulse dual-base binary finite field multiplier
  • Fast arithmetic multi-bit serial pulse dual-base binary finite field multiplier

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0017] The technical solution of the present invention will be further described below in conjunction with specific embodiments.

[0018] Such as figure 2 As shown, the specific implementation of the present invention is to construct a fast arithmetic multi-bit series pulsating dual-base binary finite field multiplier, including input B, k PE modules, FRRP modules, and R3 modules, the k PEs The modules are connected in series, and the k PE modules have passed k cycles, and the input of the first cycle A is A 0 , A 1 ,..., A k-1 , B is directly input, and the calculation result is restored and input into the register C through the FRRP module; the input A of the second cycle A k , A k+1 ,..., A 2k-1 , B is input by the R3 module, and the calculation result is also restored by the FRRP module, added to the calculation result of the first cycle, and stored in the register C; thus, the kth cycle, the input of A is B is input after (k-1) the R3 module, the calculation result is restor...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention relates to a fast arithmetic multi-bit serial pulse dual-base binary finite field multiplier, comprising an input end B, k PE modules, an FRRP module and an R3 module. The k PE modules are connected in series, the k PE modules pass through k cycles, in the first cycle, the input of A is that B is directly input, and the calculation result is restored and input into a temporary register C through the FRRP module; in the second cycle, the input of A is that B is input through the R3 module, the calculation result is also restored through the FRRP module, and is added to the calculation result of the first cycle and stored in the temporary register C; so, in the k cycle, the input of A is that B is input after passing through the R3 module for (k-1) times, the calculation result is restored through the FRRP module, added to the accumulation result of the previous (k-1) times and stored in the temporary register C, and the temporary register C outputs the result.

Description

Technical field [0001] The invention relates to a binary finite field multiplier, in particular to a fast operation multi-bit element series pulsation dual-base binary finite field multiplier. Background technique [0002] In recent years, elliptic curve cryptography (ECC, Elliptic curve cryptography) [1], [2] has been linked with the research of cryptography. With the emergence of elliptic curve cryptography in public key cryptosystems, some hardware implementation issues have been raised in the application of ECC. NIST recommended 5 binary fields, GF(2 163 ),GF(2 233 ),GF(2 283 ),GF(2 409 ), and GF(2 571 ). In the cryptographic protocol based on the ECC basis, on-site multiplication is an indispensable element for calculating points. The effectiveness of cryptographic system hardware usually affects area, energy consumption, and performance. [0003] For the realization of very-large-scale integration (VLSI), the systolic array structure is a better choice. In the extended bi...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): G06F7/52
Inventor 潘正祥杨春生白忠海李秋莹
Owner HARBIN INST OF TECH SHENZHEN GRADUATE SCHOOL
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap