Harmonic suppression circuit for electromagnetic compatibility laboratory and compensation method thereof
A harmonic suppression and electromagnetic compatibility technology, applied in harmonic reduction devices, AC networks to reduce harmonics/ripples, reactive power adjustment/elimination/compensation, etc. The voltage rise at the load inlet and the poor reliability of the measurement results can limit the closing inrush current and operating overvoltage, improve the voltage waveform, and improve the reliability and accuracy.
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[0026] In order to make the technical solution of the present invention clearer, the implementation of the present invention will be described in detail below with reference to the accompanying drawings.
[0027] Such as figure 1 As shown, the harmonic suppression circuit of the electromagnetic compatibility laboratory of Embodiment 1 of the present invention includes: a first-stage series active power filter 1, whose input point is connected to the voltage output terminal of the AC power supply Us; The source power filter 2, its input point is connected to the output point of the first stage series active power filter 1, and its output point is connected to the power supply terminal of the load.
[0028] In order to solve the problems existing in the prior art, the harmonic suppression circuit of the electromagnetic compatibility laboratory also includes: a dry-type iron core reactor 3 connected in parallel at the output point of the second-stage series active power filter 2,...
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