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Efficient heat dissipation paster type packaging structure

A packaging structure and chip-type technology, which is applied in the direction of electrical components, electric solid devices, circuits, etc., can solve the problems of no heat dissipation structure and poor heat dissipation performance, so as to prolong the service life, avoid avalanche phenomenon, and protect components. Effect

Inactive Publication Date: 2015-12-09
SHANGHAI JINGLIANG ELECTRONICS TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this invention does not have a heat dissipation structure, and the heat dissipation performance is not good.

Method used

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  • Efficient heat dissipation paster type packaging structure
  • Efficient heat dissipation paster type packaging structure
  • Efficient heat dissipation paster type packaging structure

Examples

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Embodiment Construction

[0043] The present invention will be described in detail below in conjunction with specific embodiments. The following examples will help those skilled in the art to further understand the present invention, but do not limit the present invention in any form. It should be noted that those skilled in the art can make several modifications and improvements without departing from the concept of the present invention. These all belong to the protection scope of the present invention.

[0044] In this embodiment, the high-efficiency heat dissipation chip package structure provided by the present invention includes a first heat dissipation substrate 2, a second heat dissipation substrate 11, and a chip 1; wherein, the chip 1 is provided with a collector, a source 3 and a gate pole 4; the collector is connected to the first heat dissipation substrate 2; the source 3 or gate 4 is connected to the second heat dissipation substrate 11.

[0045] The high-efficiency heat dissipation pat...

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PUM

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Abstract

The invention provides an efficient heat dissipation paster type packaging structure, comprising a first heat dissipation substrate, a second heat dissipation substrate and a chip, wherein the chip is provided with a collector, a source electrode and a gate electrode; the collector is in connection with the first heat dissipation substrate; the source electrode or the gate electrode is in connection with the second heat dissipation substrate. The efficient heat dissipation paster type packaging structure also comprises a supporting plate, on which the first heat dissipation substrate and the second heat dissipation substrate are arranged; and a plurality of collector pins which are in connection with the first heat dissipation substrate. The first heat dissipation substrate and the second heat dissipation substrate can timely discharge the heat initially generated by the chip, maintain the operation of the chip under the low temperature environment, and keep blocked impedance and higher power conversion efficiency; the efficient heat dissipation paster type packaging structure can maintain the operation of the chip under the low temperature environment, avoid avalanche, protect elements, and prolong the service life of the elements.

Description

technical field [0001] The invention relates to a power element, in particular to a high-efficiency heat dissipation patch type package structure. Background technique [0002] In the application of power components, heat will be generated when the current passes through the impedance of the components. If the heat energy is not removed in time, the temperature of the components will rise. As the temperature of the component rises, the impedance in it will rise accordingly, and more heat will be generated, and this cycle will easily cause the avalanche phenomenon of the component. A good package of power components must be able to conduct and remove the heat generated during the operation of the components in a timely manner. However, the existing power device package series all have poor heat dissipation performance. [0003] The traditional SMD packaging method of semiconductor power components, no matter whether the SMD packaging pins are two, three or more, the design ...

Claims

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Application Information

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IPC IPC(8): H01L23/367H01L23/42H01L25/07
CPCH01L2224/0603H01L2224/48247H01L2224/49111
Inventor 廖奇泊周雯
Owner SHANGHAI JINGLIANG ELECTRONICS TECH
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