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A kind of array substrate and display device

An array substrate and pixel array technology, which is applied in the direction of instruments, semiconductor devices, optics, etc., can solve the problems of array substrate 1 frame width, etc., and achieve the effects of reducing interference, solving pixel overbrightness, and reducing voltage coupling

Active Publication Date: 2019-03-08
SHANGHAI TIANMA MICRO ELECTRONICS CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The gate line 4 is connected to the drive chip 6 through the gate line connection part 4-1, and the gate line connection part 4-1 is arranged on both sides of the pixel array 2, so the gate line connection part 4-1 is on the array substrate 1 Occupies a part of the area, resulting in a wider frame of the array substrate 1

Method used

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  • A kind of array substrate and display device
  • A kind of array substrate and display device
  • A kind of array substrate and display device

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specific Embodiment approach

[0045] The second connection mode between the scanning line 30 and the gate line 10 is: the scanning line 30 is in a different layer from the gate line 10 and a via hole is set on the film layer between the two, and the scanning line 30 passes through the via hole One of the gate lines 10 is connected. The specific implementation is as follows:

[0046] Figure 9 is a top view of another pixel unit, refer to Figure 9 The pixel unit 111 has a gate line 10 connected to the gate 15 , a data line 20 connected to the source 12 , a pixel electrode 13 connected to the drain 11 and a scan line 30 . Wherein, the scan line 30 is connected to a gate line 10 through a via hole 40 .

[0047] Please refer to Figure 10 , Figure 10 Divided into two parts, the first part is along the Figure 9 The sectional view of the line EE' in the center; the second part is along the Figure 9 Sectional view of line FF' in middle. The scanning line 30 and the data line 20 are arranged in the sam...

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Abstract

The invention discloses an array substrate and a display device; the array substrate comprises a pixel array formed by a plurality of pixel units arranged in a m line*n column rectangular mode; a plurality of grid lines extend in a line direction, a plurality of data lines and scan lines extend in a column direction, wherein the scan lines are connected with one grid line and insulated from the rest grid lines; a first wiring zone or a second wiring zone are arranged between adjacent two columns of pixel units, and the first and second wiring zones are arranged in the line direction in an alternate manner; each first wiring zone is provided with two data lines; each second wiring zone is provided at most one scan line. The array substrate can enlarge the distance between the scan line and the data lines, thus reducing data line voltage coupling, and solving the partial over bright pixel conditions of the display device in middle and low gray scales.

Description

technical field [0001] The present invention relates to the field of thin film transistor (Thin Film Transistor, TFT) display technology, in particular to an array substrate and a display device including the array substrate. Background technique [0002] Array substrates, also known as TFT substrates, have the characteristics of small size and low power consumption, and occupy a dominant position in the current display field. [0003] A current TFT substrate includes a pixel array, and the pixel array includes a plurality of pixel units arranged in an array, and a TFT switch and a pixel electrode are arranged in each pixel unit. The function of the TFT switch is a three-terminal switch tube, one end is the gate, which corresponds to the gate line; one end is the source, which corresponds to the data line; the other end is the drain, which corresponds to the pixel electrode. The array substrate also includes a gate drive circuit and a data drive circuit, the gate drive circ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G02F1/1362H01L27/12
CPCG02F1/136286H01L27/124
Inventor 李谷骏庄妍
Owner SHANGHAI TIANMA MICRO ELECTRONICS CO LTD